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公开(公告)号：US07530167B2
公开(公告)日：2009-05-12
申请号：US11634287
申请日：2006-12-06
IPC分类号： H01K3/10
CPC分类号： H05K1/0216 , H05K1/0228 , H05K2201/09236 , H05K2201/09672 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A method of making a printed circuit board in which the board includes a common power plane having dielectric layers on opposing sides thereof and a signal layer on each of said dielectric layers, each signal layer comprising a plurality of substantially parallel signal lines running in substantially similar directions across said signal layers. Predetermined portions of the signal lines in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes in the power plane so as to be isolated therefrom.
摘要翻译： 一种制造印刷电路板的方法，其中所述基板包括在其相对侧上具有电介质层的公共电源平面和每个所述电介质层上的信号层，每个信号层包括基本相似的多条基本上平行的信号线 跨越所述信号层的方向。 一个信号层中的信号线的预定部分相对于并且平行于另一个信号层中的相应的信号线，而功率平面位于这些部分之间。 在两层中的选定信号线之间提供通孔连接，这些连接通过电源平面中的间隙而发生，从而与其隔离。
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公开(公告)号：US08299371B2
公开(公告)日：2012-10-30
申请号：US12972700
申请日：2010-12-20
IPC分类号： H05K1/11
CPC分类号： H05K3/462 , H05K1/162 , H05K1/167 , H05K3/4069 , H05K3/4602 , H05K3/4614 , H05K3/4623 , H05K2203/063 , Y10T29/49099 , Y10T29/49126 , Y10T29/49165
摘要： A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.
摘要翻译： 电路基板及其制造方法，其中在电介质中介层内形成有通孔数量。 基板包括两个印刷电路板（PCB）层，其结合到插入件的相对侧，每个PCB的导电特征与插入件通孔对准。 电阻浆料位于邻近通孔的导电特征上，以在两个PCB的导电特征之间形成受控的电阻连接。 还公开了电路化基板组件及其制造方法。
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公开(公告)号：US20120152605A1
公开(公告)日：2012-06-21
申请号：US12972700
申请日：2010-12-20
CPC分类号： H05K3/462 , H05K1/162 , H05K1/167 , H05K3/4069 , H05K3/4602 , H05K3/4614 , H05K3/4623 , H05K2203/063 , Y10T29/49099 , Y10T29/49126 , Y10T29/49165
摘要： A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.
摘要翻译： 电路基板及其制造方法，其中在电介质中介层内形成有通孔数量。 基板包括两个印刷电路板（PCB）层，其结合到插入件的相对侧，每个PCB的导电特征与插入件通孔对准。 电阻浆料位于邻近通孔的导电特征上，以在两个PCB的导电特征之间形成受控的电阻连接。 还公开了电路化基板组件及其制造方法。
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公开(公告)号：US20120201006A1
公开(公告)日：2012-08-09
申请号：US13022654
申请日：2011-02-08
CPC分类号： H05K7/1061 , H01L23/473 , H01L23/49833 , H01L23/5389 , H01L2924/0002 , H05K1/0203 , H05K2201/10378 , H01L2924/00
摘要： An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.
摘要翻译： 具有夹在其间的插入件的两个电路化基板的电子封装件，所述插入器将基板电气互连，同时包括至少一个电气部件（例如，功率模块），其基本上在其中，以为所得到的封装提供甚至进一步的操作能力。
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公开(公告)号：US20120068326A1
公开(公告)日：2012-03-22
申请号：US12884421
申请日：2010-09-17
IPC分类号： H01L23/22
CPC分类号： H01L23/42 , H01L23/573 , H01L24/13 , H01L24/16 , H01L24/29 , H01L2224/13101 , H01L2224/16225 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29344 , H01L2224/29369 , H01L2224/29387 , H01L2224/29393 , H01L2224/73204 , H01L2224/73253 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。
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公开(公告)号：US08558374B2
公开(公告)日：2013-10-15
申请号：US13022654
申请日：2011-02-08
CPC分类号： H05K7/1061 , H01L23/473 , H01L23/49833 , H01L23/5389 , H01L2924/0002 , H05K1/0203 , H05K2201/10378 , H01L2924/00
摘要： An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.
摘要翻译： 具有夹在其间的插入件的两个电路化基板的电子封装件，所述插入器将基板电气互连，同时包括至少一个电气部件（例如，功率模块），其基本上在其中，以为所得到的封装提供甚至进一步的操作能力。
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公开(公告)号：US08288857B2
公开(公告)日：2012-10-16
申请号：US12884421
申请日：2010-09-17
CPC分类号： H01L23/42 , H01L23/573 , H01L24/13 , H01L24/16 , H01L24/29 , H01L2224/13101 , H01L2224/16225 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29344 , H01L2224/29369 , H01L2224/29387 , H01L2224/29393 , H01L2224/73204 , H01L2224/73253 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.
摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。
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18.发明授权Circuitized substrates utilizing smooth-sided conductive layers as part thereof 失效使用平滑侧导电层作为其一部分的电路化基板公开(公告)号：US08242376B2
公开(公告)日：2012-08-14
申请号：US12854252
申请日：2010-08-11
IPC分类号： H05K1/03
CPC分类号： H01L21/4857 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01021 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K3/383 , H05K3/4641 , H05K2201/0355 , H05K2201/09318 , H05K2203/0353 , Y10S428/901 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T428/12556 , Y10T428/12993 , H01L2224/0401
摘要： A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.
摘要翻译： 其中两个导电层（例如，电镀铜箔）被结合（例如层压）到电介质层的电路化衬底。 物理地结合到电介质的两个箔表面中的每一个是光滑的（例如，优选通过化学处理），并且在其上包括薄的有机层，而两个箔的外表面也是光滑的（例如，优选也使用化学处理 步）。 这些导电层中的一个可以用作接地或电压平面，而另一个可以用作具有多个单独信号线作为其一部分的信号平面。 还提供了使用这种电路化基板的电气组件和信息处理系统。
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公开(公告)号：US07897877B2
公开(公告)日：2011-03-01
申请号：US11438424
申请日：2006-05-23
IPC分类号： H05K1/16
CPC分类号： H05K1/162 , H01L27/12 , H01L28/40 , H05K1/0306 , H05K3/125 , H05K3/4667 , H05K2201/0187 , H05K2201/09509 , H05K2203/013
摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。
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20.发明申请CIRCUITIZED SUBSTRATES UTILIZING SMOOTH-SIDED CONDUCTIVE LAYERS AS PART THEREOF 失效作为其一部分利用平滑导电层的电路基板公开(公告)号：US20100328868A1
公开(公告)日：2010-12-30
申请号：US12854252
申请日：2010-08-11
CPC分类号： H01L21/4857 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01021 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011 , H05K3/383 , H05K3/4641 , H05K2201/0355 , H05K2201/09318 , H05K2203/0353 , Y10S428/901 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T428/12556 , Y10T428/12993 , H01L2224/0401
摘要： A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.
摘要翻译： 其中两个导电层（例如，电镀铜箔）被结合（例如层压）到电介质层的电路化衬底。 物理地结合到电介质的两个箔表面中的每一个是光滑的（例如，优选通过化学处理），并且在其上包括薄的有机层，而两个箔的外表面也是光滑的（例如，优选也使用化学处理 步）。 这些导电层中的一个可以用作接地或电压平面，而另一个可以用作具有多个单独信号线作为其一部分的信号平面。 还提供了使用这种电路化基板的电气组件和信息处理系统。
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