公开(公告)号：US20120152605A1

公开(公告)日：2012-06-21

申请号：US12972700

申请日：2010-12-20

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, JR.

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, JR.

IPC分类号： H05K1/11 ,  H05K3/36

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2203/063 ,  Y10T29/49099 ,  Y10T29/49126 ,  Y10T29/49165

摘要： A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.

摘要翻译： 电路基板及其制造方法，其中在电介质中介层内形成有通孔数量。 基板包括两个印刷电路板（PCB）层，其结合到插入件的相对侧，每个PCB的导电特征与插入件通孔对准。 电阻浆料位于邻近通孔的导电特征上，以在两个PCB的导电特征之间形成受控的电阻连接。 还公开了电路化基板组件及其制造方法。

公开(公告)号：US08299371B2

公开(公告)日：2012-10-30

申请号：US12972700

申请日：2010-12-20

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr.

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr.

IPC分类号： H05K1/11

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K1/167 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2203/063 ,  Y10T29/49099 ,  Y10T29/49126 ,  Y10T29/49165

摘要： A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.

摘要翻译： 电路基板及其制造方法，其中在电介质中介层内形成有通孔数量。 基板包括两个印刷电路板（PCB）层，其结合到插入件的相对侧，每个PCB的导电特征与插入件通孔对准。 电阻浆料位于邻近通孔的导电特征上，以在两个PCB的导电特征之间形成受控的电阻连接。 还公开了电路化基板组件及其制造方法。

公开(公告)号：US20120201006A1

公开(公告)日：2012-08-09

申请号：US13022654

申请日：2011-02-08

申请人： Voya R. Markovich ,  Rabindra N. Das ,  Frank D. Egitto ,  James J. McNamara, JR.

发明人： Voya R. Markovich ,  Rabindra N. Das ,  Frank D. Egitto ,  James J. McNamara, JR.

IPC分类号： H05K7/20 ,  H05K3/36

CPC分类号： H05K7/1061 ,  H01L23/473 ,  H01L23/49833 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/10378 ,  H01L2924/00

摘要： An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.

摘要翻译： 具有夹在其间的插入件的两个电路化基板的电子封装件，所述插入器将基板电气互连，同时包括至少一个电气部件（例如，功率模块），其基本上在其中，以为所得到的封装提供甚至进一步的操作能力。

公开(公告)号：US20120068326A1

公开(公告)日：2012-03-22

申请号：US12884421

申请日：2010-09-17

申请人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Mark D. Poliks

发明人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, JR. ,  Mark D. Poliks

IPC分类号： H01L23/22

CPC分类号： H01L23/42 ,  H01L23/573 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29369 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.

摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。

公开(公告)号：US08558374B2

公开(公告)日：2013-10-15

申请号：US13022654

申请日：2011-02-08

申请人： Voya R. Markovich ,  Rabindra N. Das ,  Frank D. Egitto ,  James J. McNamara, Jr.

发明人： Voya R. Markovich ,  Rabindra N. Das ,  Frank D. Egitto ,  James J. McNamara, Jr.

IPC分类号： H01L23/34 ,  H01L21/00

CPC分类号： H05K7/1061 ,  H01L23/473 ,  H01L23/49833 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K2201/10378 ,  H01L2924/00

摘要： An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.

摘要翻译： 具有夹在其间的插入件的两个电路化基板的电子封装件，所述插入器将基板电气互连，同时包括至少一个电气部件（例如，功率模块），其基本上在其中，以为所得到的封装提供甚至进一步的操作能力。

公开(公告)号：US08288857B2

公开(公告)日：2012-10-16

申请号：US12884421

申请日：2010-09-17

申请人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Mark D. Poliks

发明人： Rabindra N. Das ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  Mark D. Poliks

IPC分类号： H01L23/22 ,  H01L23/12

CPC分类号： H01L23/42 ,  H01L23/573 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29369 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00014

摘要： A tamper-resistant microchip package contains fluid- or nanofluid-filled capsules, channels, or reservoirs, wherein the fluids, either alone or in combination, can destroy circuitry by etching, sintering, or thermally destructing when reverse engineering of the device is attempted. The fluids are released when the fluid-filled cavities are cut away for detailed inspection of the microchip. Nanofluids may be used for the sintering process, and also to increase the thermal conductivity of the fluid for die thermal management. Through-vias and micro vias may be incorporated into the design to increase circuitry destruction efficacy by improving fluid/chip contact. Thermal interface materials may also be utilized to facilitate chip cooling.

摘要翻译： 防篡改微芯片封装包含流体或纳米流体填充的胶囊，通道或储存器，其中单独或组合的流体可以在尝试逆向工程化时通过蚀刻，烧结或热破坏来破坏电路。 当流体填充的空腔被切掉以便对微芯片进行详细检查时，释放流体。 可以将纳米流体用于烧结过程，并且还可以增加用于管芯热管理的流体的热导率。 通孔和微通孔可以并入设计中以通过改善流体/芯片接触来增加电路破坏功效。 也可以使用热界面材料来促进芯片冷却。

公开(公告)号：US07897877B2

公开(公告)日：2011-03-01

申请号：US11438424

申请日：2006-05-23

申请人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  Frank D. Egitto ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H05K1/16

CPC分类号： H05K1/162 ,  H01L27/12 ,  H01L28/40 ,  H05K1/0306 ,  H05K3/125 ,  H05K3/4667 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2203/013

摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

摘要翻译： 电容性基板及其制造方法，其中使用第一和第二玻璃层。 第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。 然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。 形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

公开(公告)号：US20130033827A1

公开(公告)日：2013-02-07

申请号：US13198756

申请日：2011-08-05

申请人： Rabindra N. Das ,  Voya R. Markovich ,  John M. Lauffer ,  Roy H. Magnuson ,  Konstantinos I. Papathomas ,  Benson Chan

发明人： Rabindra N. Das ,  Voya R. Markovich ,  John M. Lauffer ,  Roy H. Magnuson ,  Konstantinos I. Papathomas ,  Benson Chan

IPC分类号： H05K5/00 ,  H05K1/09 ,  B23K31/02 ,  H05K1/00 ,  H01B1/00 ,  H01B1/02

CPC分类号： H05K1/0313 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/16 ,  B23K2103/172 ,  B23K2103/52 ,  H01B1/22 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/097 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0257 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0425 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165 ,  H01L2924/00

摘要： A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.

摘要翻译： 用于连接多级Z轴互连的多层导电粘合剂（ECA）混合物和形成连接多级Z轴互连的ECA的方法。 具有多层能力的ECA包含允许糊料适应特定要求的组成成分的混合物，其中制造电路化衬底组件的方法，其中具有潜在不同的热膨胀系数（CTE）的两个或更多个子组件对齐，并且Z- 在连接期间创建轴互连。 导体的冶金和多层导电浆料的冶金被有效地混合，并且在配合子组件之间使用的可流动的中间电介质流动以接合和围绕导体耦合。

公开(公告)号：US20110043987A1

公开(公告)日：2011-02-24

申请号：US12938759

申请日：2010-11-03

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： G06F1/16 ,  H05K7/00 ,  B82Y30/00

CPC分类号： H05K1/167 ,  H01G4/206 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/095 ,  H05K1/162 ,  H05K3/0023 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2203/1453 ,  Y10T29/49082 ,  Y10T29/49087 ,  Y10T29/49089 ,  Y10T29/49091 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/0401

摘要： A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.

摘要翻译： 一种制造电路化基板的方法，包括由包括聚合物树脂的材料和包括至少一种金属组分和至少一种陶瓷组分的混合物的纳米粉末的量组成的电阻器。 陶瓷部件可以是铁电陶瓷和/或高表面积陶瓷和/或透明氧化物和/或掺杂亚锰酸盐。 或者，材料将包括聚合物树脂和纳米粉末，其中纳米粉末包含至少一种金属涂覆的陶瓷和/或至少一种氧化物涂覆的金属组分。 还提供了使用这种电路化基板的电气组件（基板和至少一个电气部件）以及信息处理系统（例如，个人计算机）。

公开(公告)号：US07449381B2

公开(公告)日：2008-11-11

申请号：US11352279

申请日：2006-02-13

申请人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01L21/8234 ,  H01L21/00

CPC分类号： H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/013 ,  H05K2203/0568

摘要： A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

摘要翻译： 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。