公开(公告)号：US20120235138A1

公开(公告)日：2012-09-20

申请号：US13481781

申请日：2012-05-26

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Liu-Chung Lee

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Liu-Chung Lee

IPC分类号： H01L29/12 ,  H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1225

摘要： A method of fabricating a TFT and IPS with reduced masking operations includes a substrate, a gate, a layer of gate dielectric on the gate and surrounding substrate surface and a semiconducting metal oxide on the gate dielectric. A channel protection layer overlies the gate to define a channel area in the semiconducting metal oxide. A S/D metal layer is patterned on the channel protection layer and a portion of the exposed semiconducting metal oxide to define an IPS area. An organic dielectric material is patterned on the S/D terminals and at an opposed side of the IPS area. The S/D metal is etched to expose the semiconducting metal oxide defining a first IPS electrode. A passivation layer covers the first electrode and a layer of transparent conductive material is patterned on the passivation layer to define a second IPS electrode overlying the first electrode.

摘要翻译： 制造具有减小的掩模操作的TFT和IPS的方法包括基板，栅极，栅极上的栅极电介质层和周围的衬底表面以及栅极电介质上的半导体金属氧化物。 沟道保护层覆盖栅极以限定半导体金属氧化物中的沟道区。 S / D金属层在通道保护层和暴露的半导体金属氧化物的一部分上被图案化以限定IPS区域。 在S / D端子和IPS区域的相对侧上构图有机电介质材料。 蚀刻S / D金属以暴露限定第一IPS电极的半导体金属氧化物。 钝化层覆盖第一电极，并且在钝化层上图案化透明导电材料层以限定覆盖第一电极的第二IPS电极。

公开(公告)号：US20120104381A1

公开(公告)日：2012-05-03

申请号：US12915712

申请日：2010-10-29

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/12 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L29/78696

摘要： A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.

摘要翻译： 一种金属氧化物半导体器件，包括金属氧化物的有源层，栅极电介质层和低陷阱密度材料层。 低陷阱密度材料层夹在金属氧化物的有源层和栅极电介质层之间。 低陷阱密度材料层的主表面平行并与金属氧化物的有源层的主表面接触，以形成与金属氧化物的有源层的低陷阱密度界面。 可以可选地将第二层低陷阱密度材料放置成与金属氧化物的有源层的相对的主表面接触，使得与金属氧化物的活性层的两个表面形成低陷阱密度界面。

公开(公告)号：US20110104841A1

公开(公告)日：2011-05-05

申请号：US12612123

申请日：2009-11-04

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

IPC分类号： H01L21/8234 ,  H01L21/8254 ,  H01L33/00

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869

摘要： A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.

摘要翻译： 使用减少的掩模操作制造用于有源矩阵显示器的薄膜晶体管的方法包括在衬底上图形化栅极。 在栅极上形成栅极电介质，并且在栅极电介质上沉积半导体金属氧化物。 将通道保护层图案化在覆盖栅极的半导体金属氧化物上，以限定通道区域并露出剩余的半导体金属氧化物。 源极/漏极金属层沉积在结构上并蚀刻到栅极上方的沟道保护层，以将源极/漏极金属层分离成源极和漏极端子，并且源/漏极金属层和半导体金属氧化物被蚀刻通过 在外围隔离晶体管。 在晶体管和周围源极/漏极金属层的部分上构图非导电间隔物。

公开(公告)号：US10109647B2

公开(公告)日：2018-10-23

申请号：US15173481

申请日：2016-06-03

申请人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

发明人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

IPC分类号： H01L29/10 ,  H01L27/12 ,  H01L21/02 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

摘要： A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.

公开(公告)号：US09608017B2

公开(公告)日：2017-03-28

申请号：US14635865

申请日：2015-03-02

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L51/05 ,  H01L51/56

CPC分类号： H01L27/1266 ,  H01L27/1222 ,  H01L27/1225 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L51/003 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/56 ,  H01L2227/323 ,  H01L2227/326

摘要： The process of fabricating a flexible TFT back-panel includes depositing etch stop material on a glass support. A matrix of contact pads, gate electrodes and gate dielectric are deposited overlying the etch stop material. Vias are formed through the dielectric in communication with each pad. A matrix of TFTs is formed by depositing and patterning metal oxide semiconductor material to form an active layer of each TFT overlying the gate electrode. Source/drain metal is deposited on the active layer and in the vias in contact with the pads, the source/drain metal defining source/drain terminals of each TFT. Passivation material is deposited in overlying relationship to the TFTs. A color filter layer is formed on the passivation material and a flexible plastic carrier is affixed to the color filter. The glass support member and the etch stop material are then etched away to expose a surface of each of the pads.

公开(公告)号：US20170069662A1

公开(公告)日：2017-03-09

申请号：US15173481

申请日：2016-06-03

申请人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

发明人： Gang Yu ,  Chan-Long Shieh ,  Juergen Musolf ,  Fatt Foong ,  Tian Xiao

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/1203 ,  H01L21/02565 ,  H01L21/02664 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.

摘要翻译： 一种制造高迁移率半导体金属氧化物薄膜晶体管的方法，包括以下步骤：沉积半导体金属氧化物材料层，在MO材料层上沉积蚀刻停止材料的覆盖层，以及图案化源/漏层 包括将源极/漏极金属层蚀刻成定位成限定半导体金属氧化物层中的沟道区域的源极/漏极端子的蚀刻停止材料的覆盖层上的金属。 蚀刻停止材料至少在源极/漏极端子之下在垂直于覆盖层的平面的方向上导电，以在源极/漏极端子和半导体金属氧化物材料层之间提供电接触。 蚀刻停止材料也是化学稳固的，以在蚀刻工艺期间保护半导体金属氧化物沟道材料层。

公开(公告)号：US20160260752A1

公开(公告)日：2016-09-08

申请号：US14635865

申请日：2015-03-02

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

IPC分类号： H01L27/12 ,  H01L51/05 ,  H01L51/56 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L27/1222 ,  H01L27/1225 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L51/003 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/56 ,  H01L2227/323 ,  H01L2227/326

摘要： The process of fabricating a flexible TFT back-panel includes depositing etch stop material on a glass support. A matrix of contact pads, gate electrodes and gate dielectric are deposited overlying the etch stop material. Vias are formed through the dielectric in communication with each pad. A matrix of TFTs is formed by depositing and patterning metal oxide semiconductor material to form an active layer of each TFT overlying the gate electrode. Source/drain metal is deposited on the active layer and in the vias in contact with the pads, the source/drain metal defining source/drain terminals of each TFT. Passivation material is deposited in overlying relationship to the TFTs. A color filter layer is formed on the passivation material and a flexible plastic carrier is affixed to the color filter. The glass support member and the etch stop material are then etched away to expose a surface of each of the pads.

摘要翻译： 制造柔性TFT后面板的过程包括在玻璃支架上沉积蚀刻停止材料。 接触焊盘，栅极电极和栅极电介质的矩阵沉积在蚀刻停止材料上。 通过与每个焊盘连通的电介质形成通孔。 通过沉积和图案化金属氧化物半导体材料形成TFT的矩阵，以形成覆盖栅电极的每个TFT的有源层。 源极/漏极金属沉积在有源层上，并且在与焊盘接触的通孔中，源极/漏极金属限定每个TFT的源极/漏极端子。 钝化材料以与TFT相重叠的关系沉积。 在钝化材料上形成滤色器层，并将柔性塑料载体固定在滤色器上。 然后将玻璃支撑构件和蚀刻停止材料蚀刻掉以暴露每个焊盘的表面。

公开(公告)号：US09379247B2

公开(公告)日：2016-06-28

申请号：US13536641

申请日：2012-06-28

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Tian Xiao ,  Juergen Musolf

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Tian Xiao ,  Juergen Musolf

IPC分类号： H01L29/10 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L21/467 ,  H01L21/4763 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78696

摘要： A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.

摘要翻译： 一种制造稳定的高迁移率金属氧化物薄膜晶体管的方法包括以下步骤：提供衬底，将栅极定位在衬底上，以及在栅极上沉积栅极电介质层，并且将衬底部分未被栅极覆盖。 包括金属氧化物半导体膜和金属氧化物钝化膜的多层膜活性层沉积在栅极电介质上，钝化膜位于与半导体膜的重叠关系中。 蚀刻停止层位于钝化膜的表面上并限定有源层中的沟道区。 在蚀刻停止层的相对侧上的多个膜有源层的一部分被修改以形成欧姆接触，并且金属源极/漏极触点位于多个膜有源层的修改部分上。

公开(公告)号：US09356156B2

公开(公告)日：2016-05-31

申请号：US13902514

申请日：2013-05-24

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Juergen Musolf

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong ,  Juergen Musolf

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/66969 ,  H01L21/02063 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76895 ,  H01L27/1225 ,  H01L29/247 ,  H01L29/42384 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696 ,  H01L2021/775

摘要： A method of fabricating a stable high mobility amorphous MOTFT includes a step of providing a substrate with a gate formed thereon and a gate dielectric layer positioned over the gate. A carrier transport structure is deposited by sputtering on the gate dielectric layer. The carrier transport structure includes a layer of amorphous high mobility metal oxide adjacent the gate dielectric and a relatively inert protective layer of material deposited on the layer of amorphous high mobility metal oxide both deposited without oxygen and in situ. The layer of amorphous metal oxide has a mobility above 40 cm2/Vs and a carrier concentration in a range of approximately 1018 cm−3 to approximately 5×1019 cm−3. Source/drain contacts are positioned on the protective layer and in electrical contact therewith.

摘要翻译： 制造稳定的高迁移率无定形MOTFT的方法包括提供其上形成有栅极的基板和位于栅极上方的栅介质层的步骤。 通过溅射将载流子传输结构沉积在栅极介电层上。 载流子传输结构包括邻近栅极电介质的非晶高迁移率金属氧化物层，以及沉积在无氧和原位沉积的无定形高迁移率金属氧化物层上的相对惰性的材料保护层。 非晶金属氧化物层的迁移率高于40cm 2 / Vs，载流子浓度在约1018cm-3至约5×1019cm-3的范围内。 源极/漏极触点位于保护层上并与之电接触。

公开(公告)号：US20160056297A1

公开(公告)日：2016-02-25

申请号：US14833462

申请日：2015-08-24

申请人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

发明人： Gang Yu ,  Chan-Long Shieh ,  Tian Xiao ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L23/00 ,  H01L29/49

CPC分类号： H01L29/7869 ,  H01L21/321 ,  H01L21/324 ,  H01L21/383 ,  H01L21/428 ,  H01L21/44 ,  H01L21/47635 ,  H01L21/477 ,  H01L21/823418 ,  H01L23/3171 ,  H01L23/564 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.

摘要翻译： 一种方法，包括提供具有栅极的衬底，与栅极相邻的栅极绝缘体材料层和位于与栅极相对的栅极绝缘体上的金属氧化物半导体材料层，形成选择性图案化的蚀刻停止钝化层并在高温下加热 在含氧或含氮或惰性气氛中选择性地增加未被蚀刻停止层覆盖的金属氧化物半导体的区域中的载流子浓度，其上形成有上层和间隔开的源极/漏极金属。 随后在含氧或含氮或惰性气氛中加热晶体管，以进一步改善源极/漏极接触并将阈值电压调节到所需的电平。 在晶体管的顶部提供额外的钝化层，具有电气绝缘和对周围环境中的潮湿和化学物质的阻隔性能。