公开(公告)号：US08754494B2

公开(公告)日：2014-06-17

申请号：US13234471

申请日：2011-09-16

申请人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Hirokazu Sekine

发明人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Hirokazu Sekine

IPC分类号： H01L31/0203 ,  H01L31/0232 ,  H01L27/146 ,  G03B17/00 ,  H04N5/225

CPC分类号： H01L27/14618 ,  H01L27/14625 ,  H01L2224/13

摘要： According to one embodiment, a solid-state image sensing device includes a semiconductor substrate on which a plurality of pixels are arranged, a transparent substrate including a first through via provided in an opening formed in advance to extend through, an adhesive including a second through via connected to the first through via and configured to bond the semiconductor substrate and the transparent substrate while exposing the pixels, and an imaging lens unit arranged on the transparent substrate.

摘要翻译： 根据一个实施例，固态图像感测装置包括其上布置有多个像素的半导体衬底，透明衬底，其包括设置在预先形成以延伸穿过的开口中的第一通孔，粘合剂，包括第二通孔 通过连接到第一通孔并且被配置为在暴露像素的同时将半导体衬底和透明衬底接合，以及布置在透明衬底上的成像透镜单元。

公开(公告)号：US20110105734A1

公开(公告)日：2011-05-05

申请号：US12517936

申请日：2006-12-19

申请人： Atsuko Kawasaki ,  Keisuke Mukai ,  Sei Kirihara

发明人： Atsuko Kawasaki ,  Keisuke Mukai ,  Sei Kirihara

IPC分类号： C12P21/00 ,  C07K1/22

CPC分类号： C07K14/505

摘要： Disclosed is a method for production of human erythropoietin. By the method, the cells are cultured in a serum-free medium with repetitive medium exchanges, in which medium exchange is carried out either by collecting 80 to 95% of the culture when viable cell density has reached at 2×106˜4×106 cells/mL, or by adjusting the amount of the exchanged medium so that the initial density of the viable cells may be 1.5×105˜2.5×105 cells/mL.

摘要翻译： 公开了一种生产人促红细胞生成素的方法。 通过该方法，将细胞在具有重复培养基交换的无血清培养基中培养，当存活细胞密度达到2×106〜4×106时，通过收集80〜95％的培养物进行培养基交换 细胞/ mL，或通过调节交换培养基的量使活细胞的初始密度为1.5×105〜2.5×10 5个细胞/ mL。

公开(公告)号：US20080023442A1

公开(公告)日：2008-01-31

申请号：US11826922

申请日：2007-07-19

申请人： Shoko Ito ,  Makiko Katano ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi

发明人： Shoko Ito ,  Makiko Katano ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi

IPC分类号： C03C25/68 ,  C23C16/00

CPC分类号： H01L21/67393 ,  H01L21/67253 ,  H01L21/76224 ,  H01L27/115 ,  H01L27/11521 ,  Y10S414/135

摘要： A method for manufacturing an electronic device using a closed-type transport container, includes: controlling relative humidity inside the closed-type transport container to be lower than ambient relative humidity outside the closed-type transport container on a particular interprocess transport path in which an intermediate product stored in the closed-type transport container is transported from a first manufacturing process to a second manufacturing process. The first manufacturing process allows basic compounds containing nitrogen atoms to be released from the intermediate product. The second manufacturing process is susceptible to degradation due to contamination by the basic compounds.

摘要翻译： 一种使用封闭式输送容器的电子装置的制造方法，其特征在于，包括：在所述封闭式输送容器内部的相对湿度比所述封闭式输送容器外的环境相对湿度低的特定过程输送路径， 存储在封闭式运输容器中的中间产品从第一制造过程运输到第二制造过程。 第一制造方法允许含有氮原子的碱性化合物从中间产物中释放出来。 第二制造过程由于碱性化合物的污染而易于降解。

公开(公告)号：US07214595B2

公开(公告)日：2007-05-08

申请号：US10607216

申请日：2003-06-27

申请人： Atsuko Kawasaki ,  Satoshi Matsuda ,  Hisakazu Matsumori ,  Hidenori Shibata ,  Kumi Okuwada

发明人： Atsuko Kawasaki ,  Satoshi Matsuda ,  Hisakazu Matsumori ,  Hidenori Shibata ,  Kumi Okuwada

IPC分类号： H01L21/76

CPC分类号： H01L21/76229 ,  H01L21/76224

摘要： A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of: forming an etching resistive mask over a semiconductor substrate; etching the semiconductor substrate through an opening in the etching resistive mask to form a device isolation trench; forming a coat of a silazane perhydride polymer solution over the semiconductor substrate having the device isolation trench formed therein; vaporizing a solvent from the coat and then subjecting the coat to chemical reaction to form a film of silicon oxide; removing said film of the silicon oxide leaving a residue inside said device isolation trench; and heating said silicon oxide left in said device isolation trench for densification.

摘要翻译： 提供了一种制造半导体器件的方法，这使得可以在器件隔离沟槽中埋入氧化硅而没有形状劣化。 该方法包括以下步骤：在半导体衬底上形成蚀刻电阻掩模; 通过蚀刻电阻掩模中的开口蚀刻半导体衬底以形成器件隔离沟槽; 在其上形成有器件隔离沟槽的半导体衬底上形成硅氮烷聚合物溶液涂层; 从涂层中蒸发溶剂，然后使涂层进行化学反应以形成氧化硅膜; 在所述器件隔离沟槽内去除留下残留物的所述氧化硅膜; 并加热留在所述器件隔离沟槽中的所述氧化硅用于致密化。

公开(公告)号：US08580652B2

公开(公告)日：2013-11-12

申请号：US12875628

申请日：2010-09-03

申请人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

发明人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

IPC分类号： H01L29/78

CPC分类号： H01L27/14683 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/522 ,  H01L24/13 ,  H01L24/32 ,  H01L27/14618 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12043 ,  H01L2924/3025 ,  H01L2924/00

摘要： According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

摘要翻译： 根据一个实施例，公开了一种半导体器件的制造方法。 半导体器件包括具有第一和第二主表面的半导体衬底，以及穿过第一和第二主表面之间的通孔，第一主表面上的焊盘，通孔中的通孔，以及包括 连接部分，以直接连接焊盘和通孔，以及另一个连接部分，以间接连接焊盘和通孔。 该方法包括在第一主表面中形成隔离区，隔离区位于要形成通孔的区域中，并且位于除了形成通孔的区域之外的区域中，形成垫， 以及通过处理所述衬底形成所述通孔以暴露所述衬垫的一部分。

公开(公告)号：US07407864B2

公开(公告)日：2008-08-05

申请号：US11175305

申请日：2005-07-07

申请人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Keisuke Nakazawa ,  Osamu Arisumi ,  Takeshi Hoshi ,  Katsuhiko Tachibana

发明人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Keisuke Nakazawa ,  Osamu Arisumi ,  Takeshi Hoshi ,  Katsuhiko Tachibana

IPC分类号： H01L21/76

CPC分类号： H01L21/3125 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/31053 ,  H01L21/316 ,  H01L21/76224

摘要： Disclosed is a method of manufacturing a semiconductor device comprising forming an element isolation trench in a semiconductor substrate, coating a polysilazane perhydride solution on the semiconductor substrate having the element isolation trench formed thereon to form a polysilazane perhydride film, the polysilazane perhydride solution comprising dibutyl ether having a butanol concentration of 30 ppm or less, and polysilazane perhydride dissolved in the dibutyl ether, subjecting the polysilazane perhydride film to oxidation in an atmosphere containing water vapor to form a silicon dioxide film, and selectively removing the silicon dioxide film to leave the silicon dioxide film in the element isolation trench to form an element isolating insulation film.

摘要翻译： 公开了一种制造半导体器件的方法，包括在半导体衬底中形成元件隔离沟槽，在其上形成元件隔离沟槽的半导体衬底上涂覆聚硅氮烷二次酐溶液以形成聚硅氮烷过渡膜，所述聚硅氮烷过硼酸盐溶液包含二丁基醚 具有30ppm以下的丁醇浓度，溶解在二丁基醚中的聚硅氮烷二烷基化钠，在含有水蒸汽的气氛中使聚硅氮烷二次酐膜氧化，形成二氧化硅膜，选择性地除去二氧化硅膜离开硅 元件隔离沟中的二氧化硅膜形成元件隔离绝缘膜。

公开(公告)号：US20060205233A1

公开(公告)日：2006-09-14

申请号：US11431076

申请日：2006-05-10

申请人： Katsuhiko Hieda ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Katsuhiko Tachibana ,  Soichi Yamazaki

发明人： Katsuhiko Hieda ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Katsuhiko Tachibana ,  Soichi Yamazaki

IPC分类号： H01L21/469 ,  H01L21/31

CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02318 ,  H01L21/02337 ,  H01L21/31111 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31612 ,  H01L21/31683 ,  H01L21/76224 ,  H01L21/76229

摘要： There is disclosed a method of manufacturing a semiconductor device, wherein an Si3N4 film is formed as a mask member on the surface of a silicon substrate, then etched to form an STI trench. A solution of perhydrogenated silazane polymer is coated on the surface of the silicon substrate having an STI trench formed thereon to deposit a coated film (PSZ film) thereon. The PSZ film deposited on the mask member is removed, leaving part of the PSZ film inside the trench, wherein the thickness of the PSZ film is controlled to make the height thereof from the bottom of the STI trench become 600 nm or less. Thereafter, the PSZ film is heat-treated in a water vapor-containing atmosphere to convert the PSZ film into a silicon oxide film through a chemical reaction of the PSZ film. Subsequently, the silicon oxide film is heat-treated to densify the silicon oxide film.

公开(公告)号：US20060205165A1

公开(公告)日：2006-09-14

申请号：US11175305

申请日：2005-07-07

申请人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Keisuke Nakazawa ,  Osamu Arisumi ,  Takeshi Hoshi ,  Katsuhiko Tachibana

发明人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Keisuke Nakazawa ,  Osamu Arisumi ,  Takeshi Hoshi ,  Katsuhiko Tachibana

IPC分类号： H01L21/76

CPC分类号： H01L21/3125 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/31053 ,  H01L21/316 ,  H01L21/76224

摘要： Disclosed is a method of manufacturing a semiconductor device comprising forming an element isolation trench in a semiconductor substrate, coating a polysilazane perhydride solution on the semiconductor substrate having the element isolation trench formed thereon to form a polysilazane perhydride film, the polysilazane perhydride solution comprising dibutyl ether having a butanol concentration of 30 ppm or less, and polysilazane perhydride dissolved in the dibutyl ether, subjecting the polysilazane perhydride film to oxidation in an atmosphere containing water vapor to form a silicon dioxide film, and selectively removing the silicon dioxide film to leave the silicon dioxide film in the element isolation trench to form an element isolating insulation film.

摘要翻译： 公开了一种制造半导体器件的方法，包括在半导体衬底中形成元件隔离沟槽，在其上形成元件隔离沟槽的半导体衬底上涂覆聚硅氮烷二次酐溶液以形成聚硅氮烷过渡膜，所述聚硅氮烷过硼酸盐溶液包含二丁基醚 具有30ppm以下的丁醇浓度，溶解在二丁基醚中的聚硅氮烷二烷基化钠，在含有水蒸汽的气氛中使聚硅氮烷二次酐膜氧化，形成二氧化硅膜，选择性地除去二氧化硅膜离开硅 元件隔离沟中的二氧化硅膜形成元件隔离绝缘膜。

公开(公告)号：US20060151855A1

公开(公告)日：2006-07-13

申请号：US11285156

申请日：2005-11-23

申请人： Masahiro Kiyotoshi ,  Atsuko Kawasaki

发明人： Masahiro Kiyotoshi ,  Atsuko Kawasaki

IPC分类号： H01L21/76 ,  H01L29/06

CPC分类号： H01L29/7833 ,  H01L21/76229 ,  H01L29/6659

摘要： A semiconductor device includes a semiconductor substrate including an isolation trench provided on a surface thereof, an isolation film provided in the isolation trench, the isolation film including a coating film and a silicon oxide film provided on the coating film, and an oxide film provided between the isolation trench and the isolation film, the oxide film having a thickness such that a portion on a side surface of the isolation trench corresponding to an interface portion between the coating film and the silicon oxide film is thicker than other portion on the side surface.

摘要翻译： 半导体器件包括：半导体衬底，包括设置在其表面上的隔离沟槽;隔离膜，设置在隔离沟槽中;隔离膜包括涂覆膜和设置在涂膜上的氧化硅膜;以及氧化膜， 隔离沟槽和隔离膜，氧化膜的厚度使得与涂膜和氧化硅膜之间的界面部分相对应的隔离沟槽的侧表面上的部分比侧表面上的其它部分厚。

公开(公告)号：US20050170608A1

公开(公告)日：2005-08-04

申请号：US10989319

申请日：2004-11-17

申请人： Masahiro Kiyotoshi ,  Atsuko Kawasaki ,  Katsuhiko Hieda

发明人： Masahiro Kiyotoshi ,  Atsuko Kawasaki ,  Katsuhiko Hieda

IPC分类号： H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L21/8242 ,  H01L29/78

CPC分类号： H01L21/76235 ,  H01L21/76229 ,  H01L27/10861

摘要： A semiconductor device comprises a semiconductor substrate; a trench formed on the semiconductor substrate; and an isolation region filled in the trench, the isolation region having a lower wet etching rate near the upper edge of said trench than that of the lower portion of said trench, and the wet etching rate of the isolation region being almost uniform on a plane parallel to the surface of the semiconductor substrate.

摘要翻译： 半导体器件包括半导体衬底; 形成在半导体衬底上的沟槽; 以及填充在所述沟槽中的隔离区域，所述隔离区域在所述沟槽的上边缘附近具有比所述沟槽的下部的较低的湿蚀刻速率，并且所述隔离区域的湿蚀刻速率在平面上几乎均匀 平行于半导体衬底的表面。