公开(公告)号：US20110068476A1

公开(公告)日：2011-03-24

申请号：US12875628

申请日：2010-09-03

申请人： Atsuko KAWASAKI ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

发明人： Atsuko KAWASAKI ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

IPC分类号： H01L23/48 ,  H01L21/762

CPC分类号： H01L27/14683 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/522 ,  H01L24/13 ,  H01L24/32 ,  H01L27/14618 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12043 ,  H01L2924/3025 ,  H01L2924/00

摘要： According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

摘要翻译： 根据一个实施例，公开了一种半导体器件的制造方法。 半导体器件包括具有第一和第二主表面的半导体衬底，以及穿过第一和第二主表面之间的通孔，第一主表面上的焊盘，通孔中的通孔，以及包括 连接部分，以直接连接焊盘和通孔，以及另一个连接部分，以间接连接焊盘和通孔。 该方法包括在第一主表面中形成隔离区，隔离区位于要形成通孔的区域中，并且位于除了形成通孔的区域之外的区域中，形成垫， 以及通过处理所述衬底形成所述通孔以暴露所述衬垫的一部分。

公开(公告)号：US08580652B2

公开(公告)日：2013-11-12

申请号：US12875628

申请日：2010-09-03

申请人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

发明人： Atsuko Kawasaki ,  Kenichiro Hagiwara ,  Ikuko Inoue ,  Kazutaka Akiyama ,  Itsuko Sakai ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Yoshiteru Koseki ,  Hiroki Neko ,  Koushi Tozuka ,  Kazuhiko Nakadate ,  Takuto Inoue

IPC分类号： H01L29/78

CPC分类号： H01L27/14683 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/522 ,  H01L24/13 ,  H01L24/32 ,  H01L27/14618 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12043 ,  H01L2924/3025 ,  H01L2924/00

摘要： According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

摘要翻译： 根据一个实施例，公开了一种半导体器件的制造方法。 半导体器件包括具有第一和第二主表面的半导体衬底，以及穿过第一和第二主表面之间的通孔，第一主表面上的焊盘，通孔中的通孔，以及包括 连接部分，以直接连接焊盘和通孔，以及另一个连接部分，以间接连接焊盘和通孔。 该方法包括在第一主表面中形成隔离区，隔离区位于要形成通孔的区域中，并且位于除了形成通孔的区域之外的区域中，形成垫， 以及通过处理所述衬底形成所述通孔以暴露所述衬垫的一部分。

公开(公告)号：US20090096051A1

公开(公告)日：2009-04-16

申请号：US12249438

申请日：2008-10-10

申请人： Hitoshi SUGIYAMA ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

发明人： Hitoshi SUGIYAMA ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

IPC分类号： H01L31/0216 ,  H01L31/18

CPC分类号： H01L27/14634 ,  H01L27/14618 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/14685 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014

摘要： A solid state imaging device includes: an imaging device substrate with an imaging device section formed on a first major surface side thereof; a backside interconnect electrode provided on a second major surface side of the imaging device substrate and electrically connected to the imaging device section, the second major surface being on the opposite side of the first major surface; a circuit substrate provided with a circuit substrate electrode opposed to the second major surface; a connecting portion electrically connecting the backside interconnect electrode to the circuit substrate electrode; and a light shielding layer provided coplanar with the backside interconnect electrode or on the circuit substrate side of the backside interconnect electrode.

摘要翻译： 固态成像装置包括：具有形成在其第一主表面侧的成像装置部分的成像装置基板; 设置在成像器件基板的第二主表面侧并电连接到成像器件部分的背面互连电极，第二主表面在第一主表面的相对侧上; 电路基板，设置有与第二主表面相对的电路基板电极; 连接部，其将所述背面侧配线电极与所述电路基板电极电连接; 以及与背面配线电极共同设置的遮光层，或背面配线电极的电路基板侧。

公开(公告)号：US07888760B2

公开(公告)日：2011-02-15

申请号：US12249438

申请日：2008-10-10

申请人： Hitoshi Sugiyama ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

发明人： Hitoshi Sugiyama ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

IPC分类号： H01L27/146 ,  H01L31/0216

CPC分类号： H01L27/14634 ,  H01L27/14618 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/14685 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014

摘要： A solid state imaging device includes: an imaging device substrate with an imaging device section formed on a first major surface side thereof; a backside interconnect electrode provided on a second major surface side of the imaging device substrate and electrically connected to the imaging device section, the second major surface being on the opposite side of the first major surface; a circuit substrate provided with a circuit substrate electrode opposed to the second major surface; a connecting portion electrically connecting the backside interconnect electrode to the circuit substrate electrode; and a light shielding layer provided coplanar with the backside interconnect electrode or on the circuit substrate side of the backside interconnect electrode.

摘要翻译： 固态成像装置包括：具有形成在其第一主表面侧的成像装置部分的成像装置基板; 设置在成像器件基板的第二主表面侧并电连接到成像器件部分的背面互连电极，第二主表面在第一主表面的相对侧上; 电路基板，设置有与第二主表面相对的电路基板电极; 连接部，其将所述背面侧配线电极与所述电路基板电极电连接; 以及与背面配线电极共同设置的遮光层，或背面配线电极的电路基板侧。

公开(公告)号：US20060287754A1

公开(公告)日：2006-12-21

申请号：US11471675

申请日：2006-06-21

申请人： Junji Sugamoto ,  Yukihiro Ushiku ,  Kazutaka Akiyama ,  Shoichi Harakawa

发明人： Junji Sugamoto ,  Yukihiro Ushiku ,  Kazutaka Akiyama ,  Shoichi Harakawa

IPC分类号： G06F19/00

CPC分类号： G05B19/41875 ,  G05B2219/31477 ,  G05B2219/32057 ,  G05B2219/32097 ,  G05B2219/45031 ,  Y02P90/12 ,  Y02P90/20 ,  Y02P90/22

摘要： A process control system includes a client computer which prepares a correlation between a reference monitored value of apparatus information and a feature quantity, a manufacturing execution system which prepares a processing recipe describing, as a first setting value in an actual manufacturing process, a value of the control parameter, an apparatus information collection section which collects an objective monitored value of the apparatus information in operation of the actual manufacturing process with the first setting value, a feature quantity calculation section which calculates a value of a feature quantity corresponding to the objective monitored value based on the correlation, a parameter calculation section which calculates a second setting value in the actual manufacturing process on the basis of the value of the feature quantity, and an apparatus control unit which changes the processing recipe with the second setting value being as a setting value of the second step.

公开(公告)号：US20050116333A1

公开(公告)日：2005-06-02

申请号：US10807274

申请日：2004-03-24

申请人： Kazutaka Akiyama

发明人： Kazutaka Akiyama

IPC分类号： H01L23/52 ,  H01L21/301 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532 ,  H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/564 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a semiconductor device that includes: a semiconductor substrate; a first insulating film formed above the semiconductor substrate and having a relative dielectric constant of 3.8 or less; a conductor which covers a side face of the first insulating film at least near four corners of the semiconductor substrate, and at least an outer side face of which has a conductive barrier layer; and a second insulating film covering the outer side face of the conductor and having a relative dielectric constant of over 3.8. Also disclosed is a semiconductor device that includes: a conductor covering a side face of the first insulating film at least near four corners of the semiconductor substrate; and a corrosion resistant conductor formed at least near the four corners of the semiconductor substrate to extend from directly under the second insulating film to directly under the conductor.

摘要翻译： 公开了一种半导体器件，其包括：半导体衬底; 形成在半导体衬底之上并具有3.8或更小的相对介电常数的第一绝缘膜; 覆盖所述第一绝缘膜的至少靠近所述半导体衬底的四个角的侧面的导体，并且其至少外侧面具有导电阻挡层; 以及覆盖导体的外侧面并且具有超过3.8的相对介电常数的第二绝缘膜。 还公开了一种半导体器件，其包括：在半导体衬底的至少四个角附近覆盖第一绝缘膜的侧面的导体; 以及至少形成在半导体衬底的四个角附近的耐腐蚀导体，以从第二绝缘膜的正下方延伸到导体的正下方。

公开(公告)号：US07701004B2

公开(公告)日：2010-04-20

申请号：US12010935

申请日：2008-01-31

申请人： Kazutaka Akiyama

发明人： Kazutaka Akiyama

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/76816 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76808 ,  H01L21/76837 ,  H01L21/76895 ,  H01L21/76897 ,  H01L2221/1031 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

摘要： A first conductive layer and a second conductive layer are formed on an upper surface of a semiconductor substrate. The second conductive layer formed at a higher location than the first conductive layer. An insulating film is formed over the semiconductor substrate to cover the first conductive layer and the second conductive layer. An interlayer insulator has a structure of at least two layers including a first layered film composed of an organic insulating material and a second layered film composed of an inorganic insulating material and formed on the first layered film. The interlayer insulator is formed covering the first conductive layer and the second conductive layer.

摘要翻译： 第一导电层和第二导电层形成在半导体衬底的上表面上。 第二导电层形成在比第一导电层更高的位置处。 在半导体衬底上形成绝缘膜以覆盖第一导电层和第二导电层。 层间绝缘体具有包括由有机绝缘材料构成的第一层状膜和形成在第一层状膜上的由无机绝缘材料构成的第二层状膜的至少两层的结构。 层间绝缘体形成为覆盖第一导电层和第二导电层。

公开(公告)号：US07348623B2

公开(公告)日：2008-03-25

申请号：US10657119

申请日：2003-09-09

申请人： Kazutaka Akiyama

发明人： Kazutaka Akiyama

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L28/40 ,  H01L21/76838 ,  H01L23/5223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L23/585 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate; a first wiring formed above the semiconductor substrate with a first insulating film interposed therebetween; an MIM capacitor formed above the first insulating film; a second insulating film formed to cover the MIM capacitor; a second wiring formed on the second insulating film; and a guard ring buried in the second insulating film to surround the MIM capacitor.

摘要翻译： 半导体器件包括：半导体衬底; 形成在半导体衬底之上的第一布线，其间插入有第一绝缘膜; 形成在所述第一绝缘膜上方的MIM电容器; 形成为覆盖MIM电容器的第二绝缘膜; 形成在第二绝缘膜上的第二布线; 以及埋在第二绝缘膜中以围绕MIM电容器的保护环。

公开(公告)号：US20080054395A1

公开(公告)日：2008-03-06

申请号：US11892635

申请日：2007-08-24

申请人： Kazutaka Akiyama ,  Takaya Matsushita

发明人： Kazutaka Akiyama ,  Takaya Matsushita

IPC分类号： H01L23/62 ,  H01L21/4763

CPC分类号： H01L23/5258 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is provided with a conductor wire and a fuse wire formed in an insulating film over a semiconductor substrate, a first under-pad-wire insulating film formed above the insulating film, a second under-pad-wire insulating film formed on the first under-pad-wire insulating film, a pad wire formed in an area above the conductive wire, in the first and second under-pad-wire insulating films and an opening formed by leaving a part of the first under-pad-wire insulating film in an area above the fuse wire, in the first and second under-pad-wire insulating films, wherein the second under-pad-wire insulating film comprises an element different from that of the first under-pad-wire insulating film.

摘要翻译： 半导体器件设置有形成在半导体衬底上的绝缘膜中的导体线和熔丝，在绝缘膜上方形成的第一焊盘下绝缘膜，形成在绝缘膜上的第二焊盘下绝缘膜 第一下焊丝线绝缘膜，形成在导电线上方的区域中的焊盘，位于第一和第二焊盘下绝缘膜中的开口，以及通过留下第一下焊丝线绝缘的一部分而形成的开口 在第一和第二下焊丝线绝缘膜中的熔丝线上方的区域中的第二底焊丝线绝缘膜，其中第二焊盘下绝缘膜包括与第一焊盘下绝缘膜不同的元件。

公开(公告)号：US06888220B2

公开(公告)日：2005-05-03

申请号：US10238694

申请日：2002-09-11

申请人： Kazutaka Akiyama

发明人： Kazutaka Akiyama

IPC分类号： H01L21/3205 ,  H01L21/02 ,  H01L21/768 ,  H01L21/822 ,  H01L23/52 ,  H01L23/522 ,  H01L27/02 ,  H01L27/04 ,  H01L27/08 ,  H01L29/00

CPC分类号： H01L28/60 ,  H01L21/76802 ,  H01L21/76819 ,  H01L23/5223 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor substrate, an insulative film formed above the semiconductor substrate, the film having a first groove and a second groove greater in width than the first groove, a wiring lead buried in the first groove of the insulative film to have a substantially flat surface, and a capacitor buried in the second groove of the insulative film to have a substantially flat surface, the capacitor having a multilayer structure including a first conductive film identical in material to the lead, a capacitor dielectric film, and a second conductive film.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底之上的绝缘膜，该膜具有第一沟槽和宽度大于第一沟槽的第二沟槽，埋入绝缘膜的第一槽中的布线引线， 基本上平坦的表面，以及埋入绝缘膜的第二槽中的电容器，以具有基本上平坦的表面，该电容器具有多层结构，该多层结构包括与引线材料相同的第一导电膜，电容器电介质膜和第二导电 电影。