公开(公告)号：US20100041173A1

公开(公告)日：2010-02-18

申请号：US12442617

申请日：2007-09-14

Applicant: Jun Hee Lee ,  Jong Kyu Kim ,  Yeo Jin Yoon

Inventor： Jun Hee Lee ,  Jong Kyu Kim ,  Yeo Jin Yoon

IPC: H01L33/00 ,  H01L21/78

CPC classification number: H01L33/0095 ,  H01L33/20

Abstract: The present invention provides a method of fabricating a light emitting diode chip having an active layer between an N type semiconductor layer and a P type semiconductor layer. The method comprises the steps of preparing a substrate; laminating the semiconductor layers on the substrate, the semiconductor layers having the active layer between the N type semiconductor layer and the P type semiconductor layer; and forming grooves on the semiconductor layers laminated on the substrate until the substrate is exposed, whereby inclined sidewalls are formed by the grooves in the semiconductor layers divided into a plurality of chips. According to embodiments of the present invention, a sidewall of a semiconductor layer formed on a substrate of a light emitting diode chip is inclined with respect to the substrate, whereby its directional angle is widened as compared with a light emitting diode chip without such inclination. As the directional angle of the light emitting diode chip is wider, when a white light emitting device is fabricated using the light emitting diode chip and a phosphor, light uniformity can be adjusted even though the phosphor is not concentrated at the center of the device. Thus, the overall light emitting efficiency can be enhanced by reducing a light blocking phenomenon caused by the increased amount of the phosphor distributed at the center portion.

Abstract translation: 本发明提供一种制造在N型半导体层和P型半导体层之间具有有源层的发光二极管芯片的方法。 该方法包括以下步骤：制备基底; 在所述基板上层叠所述半导体层，所述半导体层具有在所述N型半导体层和所述P型半导体层之间的有源层; 以及在层叠在基板上的半导体层上形成凹槽，直到基板被暴露，由此通过划分成多个芯片的半导体层中的凹槽形成倾斜的侧壁。 根据本发明的实施例，形成在发光二极管芯片的基板上的半导体层的侧壁相对于基板倾斜，由此与没有倾斜的发光二极管芯片相比，其方向角度变宽。 随着发光二极管芯片的方位角变宽，当使用发光二极管芯片和荧光体制造白色发光器件时，即使荧光体不集中在器件的中心，也可以调整光均匀性。 因此，通过减少由分散在中心部分的荧光体的量增加引起的遮光现象，可以提高整体发光效率。

公开(公告)号：US20100006870A1

公开(公告)日：2010-01-14

申请号：US12568630

申请日：2009-09-28

Applicant: Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

Inventor： Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

IPC: H01L33/00

CPC classification number: H01L27/15 ,  H01L27/153 ,  H01L27/3281 ,  H01L33/08 ,  H01L33/20 ,  H01L33/24 ,  H01L33/28 ,  H01L33/32 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L51/5253 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2933/0066 ,  H01L2924/00

Abstract: The present invention relates to a light emitting device. According to the present invention, the light emitting device comprises a substrate, a plurality of light emitting cells disposed on the substrate, a first insulation layer disposed on each light emitting cell, an electrically conductive material disposed on the first insulation layer to couple two of the light emitting cells, and a second insulation layer disposed on the electrically conductive material. Each light emitting cell comprises a first semiconductor layer, a second semiconductor layer, and an inclined surface. The second insulation layer corresponds to a contour of each light emitting cell.

Abstract translation: 本发明涉及一种发光装置。 根据本发明，发光器件包括衬底，设置在衬底上的多个发光单元，设置在每个发光单元上的第一绝缘层，设置在第一绝缘层上的导电材料，以将两个 所述发光单元以及设置在所述导电材料上的第二绝缘层。 每个发光单元包括第一半导体层，第二半导体层和倾斜表面。 第二绝缘层对应于每个发光单元的轮廓。

公开(公告)号：US20090200567A1

公开(公告)日：2009-08-13

申请号：US12298238

申请日：2007-05-07

Applicant: Yeo Jin Yoon

Inventor： Yeo Jin Yoon

IPC: H01L33/00

CPC classification number: H01L33/56 ,  H01L24/73 ,  H01L33/507 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed are a chip-type LED package and a light emitting apparatus having the same. The chip-type LED package includes a thermally conductive substrate with lead electrodes formed thereon. An LED chip is mounted on the thermally conductive substrate, and a lower molding portion covers the LED chip. In addition, an upper molding portion having hardness higher than that of the lower molding portion covers the lower molding portion. The upper molding portion is formed by performing transfer molding using resin powder. Accordingly, since the lower molding portion can be formed of a resin having hardness smaller than that of the upper molding portion, it is possible to provide a chip-type LED package in which device failure due to thermal deformation of the molding portion can be prevented.

Abstract translation: 公开了一种芯片型LED封装和具有该封装的发光装置。 芯片型LED封装包括其上形成有引线电极的导热基板。 LED芯片安装在导热基板上，下模制部分覆盖LED芯片。 此外，具有比下成形部的硬度更高的硬度的上模制部分覆盖下模制部分。 上模塑部分通过使用树脂粉末进行传递模塑而形成。 因此，由于下模塑部分可以由具有小于上模塑部分的硬度的树脂形成，所以可以提供一种芯片型LED封装，其中可以防止由于模制部分的热变形引起的器件故障 。

公开(公告)号：US07572653B2

公开(公告)日：2009-08-11

申请号：US11750955

申请日：2007-05-18

Applicant: Jong Hwan Kim ,  Yeo Jin Yoon ,  Jae Ho Lee

Inventor： Jong Hwan Kim ,  Yeo Jin Yoon ,  Jae Ho Lee

IPC: H01L21/00 ,  H01L21/311

CPC classification number: H01L33/0095 ,  H01L33/20

Abstract: Disclosed herein is a method of fabricating a light emitting diode. The method comprises preparing a substrate, forming a lower semiconductor layer, an active layer and an upper semiconductor layer on the substrate, forming a photoresist pattern over the upper semiconductor layer such that a sidewall of the photoresist pattern is inclined to an upper surface of the substrate, and sequentially etching the upper semiconductor layer, active layer and lower semiconductor layer using the photoresist pattern as an etching mask. With this structure, since the light emitting diode permits light generated in the active layer to be easily emitted to an outside through the sidewalls of the semiconductor layers, it has improved light emitting efficiency.

Abstract translation: 本文公开了一种制造发光二极管的方法。 该方法包括在衬底上制备衬底，形成下半导体层，有源层和上半导体层，在上半导体层上形成光致抗蚀剂图案，使得光致抗蚀剂图案的侧壁倾斜于 衬底，并且使用光致抗蚀剂图案作为蚀刻掩模来顺序蚀刻上半导体层，有源层和下半导体层。 利用这种结构，由于发光二极管允许有源层中产生的光通过半导体层的侧壁容易地发射到外部，所以其具有改善的发光效率。

公开(公告)号：US20080251796A1

公开(公告)日：2008-10-16

申请号：US11993965

申请日：2006-06-22

Applicant: Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

Inventor： Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

IPC: H01L33/00

CPC classification number: H01L27/15 ,  H01L27/153 ,  H01L27/3281 ,  H01L33/08 ,  H01L33/20 ,  H01L33/24 ,  H01L33/28 ,  H01L33/32 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L51/5253 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2933/0066 ,  H01L2924/00

Abstract: The present invention relates to a light emitting device and a method of manufacturing the light emitting device. According to the present invention, the light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, the present invention provides a light emitting device comprising a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, and a submount substrate flip-chip bonded onto the substrate, wherein the N-type semiconductor layer of one light emitting cell and the P-type semi-conductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane. Further, the present invention provides a method of manufacturing the light emitting device. Accordingly, there is an advantage in that the characteristics of a light emitting device such as luminous efficiency, external quantum efficiency and extraction efficiency are enhanced and the reliability is secured such that light with high luminous intensity and brightness can be emitted.

Abstract translation: 本发明涉及一种发光器件及其制造方法。 根据本发明，发光器件包括衬底，形成在衬底上的N型半导体层和形成在N型半导体层上的P型半导体层，其中包括N型半导体层的侧表面 或P型半导体层的水平面为20〜80°的斜率。 此外，本发明提供了一种发光器件，其包括形成有多个发光单元的衬底，每个发光单元包括形成在N型半导体层上的N型半导体层和P型半导体层，以及基座衬底翻转 芯片接合到基板上，其中一个发光单元的N型半导体层和另一个相邻发光单元的P型半导体层彼此连接，并且至少包括P- 发光单元的半导体层的类型与水平面的斜率为20〜80°。 此外，本发明提供一种制造发光器件的方法。 因此，具有发光效率，外部量子效率，提取效率等发光装置的特性得到提高，可靠性得到确保，能够发出高发光强度和亮度的光的优点。

公开(公告)号：US20080217629A1

公开(公告)日：2008-09-11

申请号：US12088999

申请日：2006-11-28

Applicant: Jae Ho Lee ,  Yeo Jin Yoon

Inventor： Jae Ho Lee ,  Yeo Jin Yoon

IPC: H01L33/00

CPC classification number: H01L27/153 ,  H01L25/0753 ,  H01L33/62 ,  H01L2224/48

Abstract: Disclosed is an AC light emitting diode having an improved transparent electrode structure. The light emitting diode comprises a plurality of light emitting cells formed on a single substrate, each of the light emitting cells having a first conductive type semiconductor layer, a second conductive type semiconductor layer positioned on one region of the first conductive type semiconductor layer, and an active layer interposed between the first and second conductive type semiconductor layers. A transparent electrode structure is positioned on each of the light emitting cells. The transparent electrode structure includes at least two portions separated from each other, or a center portion and branches laterally extending from both sides of the center portion. Meanwhile, wires electrically connect adjacent two of the light emitting cells. Accordingly, a plurality of light emitting cells are electrically connected, whereby a light emitting diode can be provided which can be driven under AC power source. Also, an improved transparent electrode structure is employed, so that the current density can be prevented from being locally increased.

Abstract translation: 公开了具有改进的透明电极结构的AC发光二极管。 发光二极管包括形成在单个基板上的多个发光单元，每个发光单元具有第一导电型半导体层，位于第一导电型半导体层的一个区域上的第二导电型半导体层，以及 插入在第一和第二导电类型半导体层之间的有源层。 透明电极结构位于每个发光单元上。 透明电极结构包括彼此分离的至少两个部分或中心部分，并且从中心部分的两侧侧向延伸。 同时，电线电连接相邻的两个发光单元。 因此，多个发光单体电连接，从而可以提供可在交流电源下驱动的发光二极管。 此外，采用改进的透明电极结构，从而可以防止电流密度局部增加。

公开(公告)号：US08987772B2

公开(公告)日：2015-03-24

申请号：US13885777

申请日：2011-02-28

Applicant: Ye Seul Kim ,  Kyoung Wan Kim ,  Yeo Jin Yoon ,  Sang-Hyun Oh ,  Keum Ju Lee ,  Jin Woong Lee ,  Da Yeon Jeong ,  Sang Won Woo

Inventor： Ye Seul Kim ,  Kyoung Wan Kim ,  Yeo Jin Yoon ,  Sang-Hyun Oh ,  Keum Ju Lee ,  Jin Woong Lee ,  Da Yeon Jeong ,  Sang Won Woo

IPC: H01L33/38 ,  H01L33/46 ,  H01L33/10 ,  H01L33/40 ,  H01L33/44 ,  H01L33/60 ,  H01L33/36 ,  H01L33/20 ,  H01L33/42

CPC classification number: H01L33/387 ,  H01L33/0008 ,  H01L33/10 ,  H01L33/20 ,  H01L33/36 ,  H01L33/38 ,  H01L33/382 ,  H01L33/385 ,  H01L33/40 ,  H01L33/405 ,  H01L33/42 ,  H01L33/44 ,  H01L33/46 ,  H01L33/60 ,  H01L2933/0016 ,  H01L2933/0066

Abstract: Disclosed herein is an LED chip including electrode pads. The LED chip includes a semiconductor stack including a first conductive type semiconductor layer, a second conductive type semiconductor layer on the first conductive type semiconductor layer, and an active layer interposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer; a first electrode pad located on the second conductive type semiconductor layer opposite to the first conductive type semiconductor layer; a first electrode extension extending from the first electrode pad and connected to the first conductive type semiconductor layer; a second electrode pad electrically connected to the second conductive type semiconductor layer; and an insulation layer interposed between the first electrode pad and the second conductive type semiconductor layer. The LED chip includes the first electrode pad on the second conductive type semiconductor layer, thereby increasing a light emitting area.

Abstract translation: 本文公开了包括电极焊盘的LED芯片。 LED芯片包括：第一导电型半导体层，第一导电型半导体层上的第二导电型半导体层和介于第一导电型半导体层和第二导电型半导体层之间的有源层的半导体堆叠; 位于与第一导电类型半导体层相对的第二导电类型半导体层上的第一电极焊盘; 从所述第一电极焊盘延伸并连接到所述第一导电型半导体层的第一电极延伸部; 电连接到第二导电类型半导体层的第二电极焊盘; 以及插入在第一电极焊盘和第二导电型半导体层之间的绝缘层。 LED芯片包括在第二导电类型半导体层上的第一电极焊盘，由此增加发光面积。

公开(公告)号：US08628983B2

公开(公告)日：2014-01-14

申请号：US13368122

申请日：2012-02-07

Applicant: Won Cheol Seo ,  Chang Youn Kim ,  Yeo Jin Yoon

Inventor： Won Cheol Seo ,  Chang Youn Kim ,  Yeo Jin Yoon

IPC: H01L21/00

CPC classification number: H01L33/0079 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/46 ,  H01L33/641 ,  H01L2224/49107

Abstract: Disclosed herein is a light emitting diode. The light emitting diode includes a support substrate, semiconductor layers formed on the support substrate, and a metal pattern located between the support substrate and the lower semiconductor layer. The semiconductor layers include an upper semiconductor layer of a first conductive type, an active layer, and a lower semiconductor layer of a second conductive type. The semiconductor layers are grown on a sacrificial substrate and the support substrate is homogeneous with the sacrificial substrate.

Abstract translation: 这里公开了一种发光二极管。 发光二极管包括支撑衬底，形成在支撑衬底上的半导体层以及位于支撑衬底和下半导体层之间的金属图案。 半导体层包括第一导电类型的上半导体层，有源层和第二导电类型的下半导体层。 半导体层在牺牲衬底上生长，并且支撑衬底与牺牲衬底是均匀的。

公开(公告)号：US08476648B2

公开(公告)日：2013-07-02

申请号：US11993965

申请日：2006-06-22

Applicant: Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

Inventor： Jong Lam Lee ,  Jae Ho Lee ,  Yeo Jin Yoon ,  Eu Jin Hwang ,  Dae Won Kim

IPC: H01L33/00

CPC classification number: H01L27/15 ,  H01L27/153 ,  H01L27/3281 ,  H01L33/08 ,  H01L33/20 ,  H01L33/24 ,  H01L33/28 ,  H01L33/32 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L51/5253 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2933/0066 ,  H01L2924/00

Abstract: The present invention relates to a light emitting device and a method of manufacturing the light emitting device. According to the present invention, the light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, the present invention provides a light emitting device comprising a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, and a submount substrate flip-chip bonded onto the substrate, wherein the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane. Further, the present invention provides a method of manufacturing the light emitting device. Accordingly, there is an advantage in that the characteristics of a light emitting device such as luminous efficiency, external quantum efficiency and extraction efficiency are enhanced and the reliability is secured such that light with high luminous intensity and brightness can be emitted.

Abstract translation: 本发明涉及一种发光器件及其制造方法。 根据本发明，发光器件包括衬底，形成在衬底上的N型半导体层和形成在N型半导体层上的P型半导体层，其中包括N型半导体层的侧表面 或P型半导体层的水平面为20〜80°的斜率。 此外，本发明提供了一种发光器件，其包括形成有多个发光单元的衬底，每个发光单元包括形成在N型半导体层上的N型半导体层和P型半导体层，以及基座衬底翻转 芯片接合到基板上，其中一个发光单元的N型半导体层和另一个相邻的发光单元的P型半导体层彼此连接，并且至少包括P型半导体 发光单元的层与水平面的倾斜度为20〜80°。 此外，本发明提供一种制造发光器件的方法。 因此，具有发光效率，外部量子效率，提取效率等发光装置的特性得到提高，可靠性得到确保，能够发出高发光强度和亮度的光的优点。

公开(公告)号：US08309971B2

公开(公告)日：2012-11-13

申请号：US12974917

申请日：2010-12-21

Applicant: Won Cheol Seo ,  Dae Sung Kal ,  Kyung Hee Ye ,  Kyoung Wan Kim ,  Yeo Jin Yoon

Inventor： Won Cheol Seo ,  Dae Sung Kal ,  Kyung Hee Ye ,  Kyoung Wan Kim ,  Yeo Jin Yoon

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00

CPC classification number: H01L33/387 ,  H01L33/08 ,  H01L33/20 ,  H01L33/32 ,  H01L33/38 ,  H01L33/385 ,  H01L33/42 ,  H01L33/44 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

Abstract: Exemplary embodiments of the present invention relate to a including a substrate, a first conductive type semiconductor layer arranged on the substrate, a second conductive type semiconductor layer arranged on the first conductive type semiconductor layer, an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer, a first electrode pad electrically connected to the first conductive type semiconductor layer, a second electrode pad arranged on the second conductive type semiconductor layer, an insulation layer disposed between the second conductive type semiconductor layer and the second electrode pad, and at least one upper extension electrically connected to the second electrode pad, the at least one upper extension being electrically connected to the second conductive type semiconductor layer.

Abstract translation: 本发明的示例性实施例涉及包括基板，布置在基板上的第一导电类型半导体层，布置在第一导电类型半导体层上的第二导电类型半导体层，设置在第一导电类型半导体层之间的有源层 和第二导电型半导体层，电连接到第一导电类型半导体层的第一电极焊盘，布置在第二导电类型半导体层上的第二电极焊盘，设置在第二导电类型半导体层和第二电极之间的绝缘层 垫，以及电连接到第二电极焊盘的至少一个上延伸部，所述至少一个上延伸部电连接到第二导电型半导体层。