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    Light for hand tool
    11.
    外观设计
    Light for hand tool 有权
    光为手工具

    公开(公告)号：USD772458S1

    公开(公告)日：2016-11-22

    申请号：US29511605

    申请日：2014-12-11

    Applicant: Yi-Hung Lin

    Designer： Yi-Hung Lin

    Apparatus and Method for Controlling Wafer Temperature
    13.
    发明申请
    Apparatus and Method for Controlling Wafer Temperature 审中-公开
    用于控制晶片温度的装置和方法

    公开(公告)号：US20130130184A1

    公开(公告)日：2013-05-23

    申请号：US13301501

    申请日：2011-11-21

    Applicant: Chang-Shen Lu ,  Tze-Liang Lee ,  Yi-Hung Lin ,  Tai-Chun Huang ,  Pang-Yen Tsai ,  Jr-Hung Li

    Inventor： Chang-Shen Lu ,  Tze-Liang Lee ,  Yi-Hung Lin ,  Tai-Chun Huang ,  Pang-Yen Tsai ,  Jr-Hung Li

    IPC: F27D21/00

    CPC classification number: F27D21/00 ,  H01L21/67115 ,  H01L21/67248

    Abstract: A wafer temperature control apparatus comprises a first temperature sensor and a second temperature sensor. The first temperature sensor is configured to receive a first temperature signal from a center portion of a backside of a susceptor. The second temperature sensor is configured to receive a second temperature signal from an edge portion of the susceptor. A plurality of controllers are configured to adjust each heating source's output based upon the first temperature signal and the second temperature signal.

    Abstract translation: 晶片温度控制装置包括第一温度传感器和第二温度传感器。 第一温度传感器被配置为从基座的背面的中心部分接收第一温度信号。 第二温度传感器构造成从基座的边缘部分接收第二温度信号。 多个控制器被配置为基于第一温度信号和第二温度信号来调节每个加热源的输出。

    TOUCH-SENSITIVE DEVICE
    15.
    发明申请
    TOUCH-SENSITIVE DEVICE 有权
    感应敏感设备

    公开(公告)号：US20110050466A1

    公开(公告)日：2011-03-03

    申请号：US12548859

    申请日：2009-08-27

    Applicant: Yu-Kai LIN ,  Chih-Yung Chen ,  Yi-Hung Lin

    Inventor： Yu-Kai LIN ,  Chih-Yung Chen ,  Yi-Hung Lin

    IPC: H03K17/94

    CPC classification number: H03K17/9622 ,  H03K2017/9606 ,  H03K2217/960755

    Abstract: A touch-sensitive device includes a membrane substrate, an inductive layer and a protection layer. The inductive layer, arranged on a front face of the membrane substrate, has a plurality of capacitance-inductive sections, and at least one transmission line extended from a side of each of the capacitance-inductive sections. The protection layer is arranged on a front face of the inductive layer. A capacitance variation generated from the inductive section is in turn to output a signal to an electronic object via the transmission lines. After the signal is processed by the electronic object, a specific function is then executed.

    Abstract translation: 触敏装置包括膜基片，感应层和保护层。 布置在膜基片的前表面上的感应层具有多个电容感应部分，以及从每个电容感应部分的一侧延伸的至少一条传输线。 保护层布置在感应层的正面上。 从电感部分产生的电容变化反过来通过传输线将信号输出到电子对象。 在由电子对象处理信号之后，执行特定的功能。

    Wafer holder with tapered region
    18.
    发明授权
    Wafer holder with tapered region 有权
    晶圆座具有锥形区域

    公开(公告)号：US09099514B2

    公开(公告)日：2015-08-04

    申请号：US13426334

    申请日：2012-03-21

    Applicant: Yi-Hung Lin ,  Li-Ting Wang ,  Tze-Liang Lee

    Inventor： Yi-Hung Lin ,  Li-Ting Wang ,  Tze-Liang Lee

    IPC: A47G19/08 ,  H01L21/687 ,  H01L21/683 ,  H01L21/477 ,  H01L21/306 ,  H01L21/673

    CPC classification number: H05B1/0233 ,  F27B17/0025 ,  F27D5/0037 ,  H01L21/306 ,  H01L21/477 ,  H01L21/67115 ,  H01L21/67303 ,  H01L21/683 ,  H01L21/68735 ,  H01L21/68757

    Abstract: An apparatus, a system and a method are disclosed. An exemplary apparatus includes a wafer holder including a first portion and a second portion. The first and second portions are formed of the same continuous material. The first portion includes a first upper surface and a first lower surface, and the second portion including a second upper surface and a second lower surface. The apparatus further includes an interface between the first and second portions. The interface provides for a transition such that the first upper surface of the first portion tends toward the second upper surface of the second portion. The apparatus further includes a tapered region formed in the first portion. The tapered region starts at a radial distance from a center line of the wafer holder and terminates at the interface. The tapered region has an initial thickness that gradually decreases to a final thickness.

    Abstract translation: 公开了一种装置，系统和方法。 示例性装置包括具有第一部分和第二部分的晶片保持器。 第一和第二部分由相同的连续材料形成。 第一部分包括第一上表面和第一下表面，第二部分包括第二上表面和第二下表面。 该装置还包括第一和第二部分之间的界面。 界面提供了使得第一部分的第一上表面趋向于第二部分的第二上表面的过渡。 该装置还包括形成在第一部分中的锥形区域。 锥形区域从距离晶片保持器的中心线的径向距离开始，并且在界面处终止。 锥形区域具有逐渐减小到最终厚度的初始厚度。

    Reducing variation by using combination epitaxy growth
    19.
    发明授权
    Reducing variation by using combination epitaxy growth 有权
    通过组合外延生长减少变异

    公开(公告)号：US08828850B2

    公开(公告)日：2014-09-09

    申请号：US13030850

    申请日：2011-02-18

    Applicant: Yu-Hung Cheng ,  Chii-Horng Li ,  Tze-Liang Lee ,  Yi-Hung Lin

    Inventor： Yu-Hung Cheng ,  Chii-Horng Li ,  Tze-Liang Lee ,  Yi-Hung Lin

    IPC: H01L21/20 ,  H01L21/36

    CPC classification number: H01L29/66636 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02639 ,  H01L29/0847 ,  H01L29/7848

    Abstract: A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio.

    Abstract translation: 一种用于形成半导体结构的方法包括在晶片上的半导体衬底上形成栅叠层; 在所述半导体衬底中形成凹槽并邻近所述栅叠层; 以及进行选择性外延生长以在所述凹部中生长半导体材料以形成外延区域。 执行选择性外延生长的步骤包括以第一生长阶段中使用的工艺气体的第一生长蚀刻（E / G）比率进行第一生长阶段; 以及在与第一E / G比不同的第二生长阶段中使用的处理气体的第二E / G比进行第二生长阶段。

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