公开(公告)号：US20120085733A1

公开(公告)日：2012-04-12

申请号：US13042060

申请日：2011-03-07

申请人： Bencherki Mebarki ,  Hao Chen ,  Kedar Sapre ,  Anchuan Wang ,  Tushar Mandrekar ,  Jingmei Liang ,  Yongmei Chen ,  Christopher S. Ngai ,  Mehul Naik

发明人： Bencherki Mebarki ,  Hao Chen ,  Kedar Sapre ,  Anchuan Wang ,  Tushar Mandrekar ,  Jingmei Liang ,  Yongmei Chen ,  Christopher S. Ngai ,  Mehul Naik

IPC分类号： C23F1/02

CPC分类号： H01L21/0337 ,  H01L21/0338

摘要： Embodiments of the present invention pertain to methods of forming features on a substrate using a self-aligned triple patterning (SATP) process. A stack of layers is patterned near the optical resolution of a photolithography system using a high-resolution photomask. The heterogeneous stacks are selectively etched to undercut a hard mask layer beneath overlying cores. A dielectric layer, which is flowable during formation, is deposited and fills the undercut regions as well as the regions between the heterogeneous stacks. The dielectric layer is anisotropically etched and a conformal spacer is deposited on and between the cores. The spacer is anisotropically etched to leave two spacers between each core. The cores are stripped and the spacers are used together with the remaining hard mask features to pattern the substrate at triple the density of the original pattern.

摘要翻译： 本发明的实施例涉及使用自对准三重图案化（SATP）工艺在衬底上形成特征的方法。 使用高分辨率光掩模，在光刻系统的光学分辨率附近对一叠层进行图案化。 选择性地蚀刻异质堆叠以在覆盖的芯之下切割硬掩模层。 在形成期间可流动的介电层被沉积并填充底切区域以及异质堆叠之间的区域。 介电层被各向异性地蚀刻，并且保形间隔物沉积在芯之间和之间。 间隔物被各向异性蚀刻以在每个芯之间留下两个间隔物。 芯被剥离，并且间隔物与剩余的硬掩模特征一起使用以将原始图案的密度的三倍图案化。

公开(公告)号：US20110053380A1

公开(公告)日：2011-03-03

申请号：US12551180

申请日：2009-08-31

申请人： Kedar Sapre ,  Jing Tang ,  Linlin Wang ,  Abhijit Basu Mallick ,  Nitin Ingle

发明人： Kedar Sapre ,  Jing Tang ,  Linlin Wang ,  Abhijit Basu Mallick ,  Nitin Ingle

IPC分类号： H01L21/3065

CPC分类号： H01L21/3065 ,  H01L21/31116

摘要： A method of etching silicon-and-carbon-containing material is described and includes a SiConi™ etch in combination with a flow of reactive oxygen. The reactive oxygen may be introduced before the SiConi™ etch reducing the carbon content in the near surface region and allowing the SiConi™ etch to proceed more rapidly. Alternatively, reactive oxygen may be introduced during the SiConi™ etch further improving the effective etch rate.

摘要翻译： 描述了一种蚀刻含硅和碳的材料的方法，并且包括与活性氧气流组合的SiConi TM蚀刻。 可以在SiConi™蚀刻之前引入活性氧，从而减少近表面区域的碳含量，并允许SiConi™蚀刻进行得更快。 或者，可以在SiConi TM蚀刻期间引入活性氧，进一步提高有效蚀刻速率。

公开(公告)号：US20090031953A1

公开(公告)日：2009-02-05

申请号：US12249816

申请日：2008-10-10

申请人： Nitin K. Ingle ,  Zheng Yuan ,  Paul Gee ,  Kedar Sapre

发明人： Nitin K. Ingle ,  Zheng Yuan ,  Paul Gee ,  Kedar Sapre

IPC分类号： C23C16/513

CPC分类号： C23C16/401 ,  C23C16/452 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31612

摘要： Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.

摘要翻译： 描述了在衬底上沉积氧化硅层的方法。 所述方法可以包括以下步骤：向沉积室提供衬底，在沉积室外产生原子氧前体，以及将原子氧前体引入室中。 所述方法还可以包括将硅前体引入沉积室，其中硅前体和原子氧前体首先在室中混合。 硅前体和原子氧前体反应以在衬底上形成氧化硅层，并且沉积的氧化硅层可以退火。 还描述了在衬底上沉积氧化硅层的系统。

公开(公告)号：US08236708B2

公开(公告)日：2012-08-07

申请号：US12855877

申请日：2010-08-13

申请人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

发明人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

IPC分类号： H01L21/316 ,  C23C16/40

CPC分类号： H01L21/02219 ,  C23C16/401 ,  H01L21/02164 ,  H01L21/02271

摘要： Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.

摘要翻译： 本公开的方面涉及在图案化衬底上沉积电介质层的方法。 在实施方案中，通过将BIS（二乙胺）硅烷（BDEAS），臭氧和分子氧流入处理室来沉积电介质层，使得跨越图案化的衬底表面实现相对均匀的电介质生长速率。 根据实施例生长的电介质层的沉积可以减少对图案密度的依赖性，同时仍然适用于非牺牲应用。

公开(公告)号：US07994019B1

公开(公告)日：2011-08-09

申请号：US12891149

申请日：2010-09-27

申请人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

发明人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

IPC分类号： H01L21/00

CPC分类号： H01L21/02164 ,  C23C16/401 ,  C23C16/45523 ,  H01L21/0228

摘要： Aspects of the disclosure pertain to methods of depositing conformal silicon oxide layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface having heterogeneous materials and/or a heterogeneous pattern density distribution. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on underlying material and pattern density while still being suitable for non-sacrificial applications. Reduction in dependence on pattern density is achieved by terminating deposition near the end of an incubation period. Multiple deposition cycles may be conducted in series since the beneficial nature of the incubation period may repeat after a pause in deposition.

摘要翻译： 本公开的方面涉及在图案化衬底上沉积保形氧化硅层的方法。 在实施例中，通过将含硅前体和臭氧流入处理室来沉积电介质层，使得跨越具有异质材料的图案化衬底表面和/或异质图案密度分布实现相对均匀的介电生长速率。 根据实施例生长的电介质层的沉积可以降低对下层材料和图案密度的依赖性，同时仍然适用于非牺牲应用。 依靠图案密度的减少是通过在潜伏期结束时终止沉积来实现的。 多个沉积循环可以串联进行，因为在沉积停顿之后潜伏期的有益特性可以重复。

公开(公告)号：US20110223774A1

公开(公告)日：2011-09-15

申请号：US12855877

申请日：2010-08-13

申请人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

发明人： Sasha Kweskin ,  Paul Edward Gee ,  Shankar Venkataraman ,  Kedar Sapre

IPC分类号： H01L21/316

CPC分类号： H01L21/02219 ,  C23C16/401 ,  H01L21/02164 ,  H01L21/02271

摘要： Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.

摘要翻译： 本公开的方面涉及在图案化衬底上沉积电介质层的方法。 在实施方案中，通过将BIS（二乙胺）硅烷（BDEAS），臭氧和分子氧流入处理室来沉积电介质层，使得跨越图案化的衬底表面实现相对均匀的电介质生长速率。 根据实施例生长的电介质层的沉积可以减少对图案密度的依赖性，同时仍然适用于非牺牲应用。