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    Storage device
    11.
    外观设计
    Storage device 有权

    公开(公告)号：USD1042443S1

    公开(公告)日：2024-09-17

    申请号：US29784655

    申请日：2021-05-20

    Applicant: Seagate Technology LLC

    Designer： Liying Bi ,  Patrick J. Ferguson ,  Chu-Hsun Wu ,  Britt Ashcraft ,  Daniel Ashcraft ,  Eric Beaupre

    Abstract: FIG. 1 is a front right perspective view of a storage device in accordance with the claimed design;
    FIG. 2 is a front elevation view of the design of FIG. 1;
    FIG. 3 is a rear elevation view of the design of FIG. 1;
    FIG. 4 is a right side elevation view of the design of FIG. 1;
    FIG. 5 is a left side elevation view of the design of FIG. 1;
    FIG. 6 is a top plan view of the design of FIG. 1; and,
    FIG. 7 is a bottom plan view of the design of FIG. 1.
    The dash-dash broken lines in the figures depict portions of the storage device that form no part of the claimed design.
    The dot-dash broken lines in the figures immediately adjacent the shaded surfaces represent a boundary between claimed and unclaimed subject matter and form no part of the claimed design.
    The cross-hatched pattern is provided to represent a fabric material.
    The labels used herein to describe orientation (e.g., front, top, left, right) are merely for reference and are not intended to limit the interpretation of the design.

    Pre-suspend before program in a non-volatile memory (NVM)
    12.
    发明授权
    Pre-suspend before program in a non-volatile memory (NVM) 有权

    公开(公告)号：US12086462B2

    公开(公告)日：2024-09-10

    申请号：US17381342

    申请日：2021-07-21

    Applicant: Seagate Technology LLC

    Inventor： Jonathan M. Henze ,  Ryan J. Goss

    IPC: G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0676 ,  G06F3/0679 ,  G06F12/0253

    Abstract: Method and apparatus for managing data in a storage device, such as a solid-state drive (SSD). An apparatus includes a main non-volatile memory (NVM) such as a NAND flash memory. A host command queue lists pending data transfer commands to transfer data between the NVM and a host. For each write command received by the NVM to store write data to an associated target location, a controller examines the host command queue. Based on this review, the controller may direct the NVM to read data adjacent the associated target location to which data are to be written by the write command and to transfer the read data to a read cache. The read data may use some or all of the same resources used to store the write data to the NVM. The read data may be subsequently transferred from the read cache to the host.

    SINGLE ARM STEPPER ELEVATION SYSTEM
    16.
    发明公开
    SINGLE ARM STEPPER ELEVATION SYSTEM 审中-公开

    公开(公告)号：US20240221780A1

    公开(公告)日：2024-07-04

    申请号：US18530600

    申请日：2023-12-06

    Applicant: Seagate Technology LLC

    Inventor： YiChao Ma ,  Xiong Liu ,  Choon Kiat Lim ,  Than Zaw Myint

    IPC: G11B5/48 ,  G11B21/12

    CPC classification number: G11B5/48 ,  G11B21/12

    Abstract: A data storage device includes a data storage disk, an arm, a first head, an elevator, and a sleeve. The data storage disk has a first read/write surface defining an x-y plane. The arm is attached to a pivot block, wherein the arm is movable relative to the disk. The first head is supported by the arm, wherein the first head is configured to interact with the first read/write surface. The elevator is configured to move the arm in a z direction, wherein the elevator comprises a stepper motor, a gear train, and a lead screw. The sleeve partially encases the lead screw. In another aspect, a data storage device includes a data storage disk, an arm, a first head, an elevator, and a housing encasing the gear train and attached to the pivot block.

    FAULT-TOLERANT MEMORY APPLIANCE
    17.
    发明公开
    FAULT-TOLERANT MEMORY APPLIANCE 审中-公开

    公开(公告)号：US20240220358A1

    公开(公告)日：2024-07-04

    申请号：US18400782

    申请日：2023-12-29

    Applicant: Seagate Technology LLC

    Inventor： Mohamad EL-BATAL ,  Jon D. TRANTHAM ,  David Jerome ALLEN ,  Matthew Bruce LOVELL ,  Kevin Lee VAN PELT

    IPC: G06F11/10

    CPC classification number: G06F11/1044

    Abstract: The technology disclosed herein provides a memory blade including a plurality of fabric switches configured to receive commands from a plurality of host clients, an address decoder and tracker circuit communicatively connected to the fabric switches and configured to determine the source of commands received at the fabric switches an aggregator crossbar configured to provide bandwidth aggregation between host clients and a plurality of memory modules; and a buffer module configured to couple the commands from the plurality of host clients with the plurality of memory modules.

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