公开(公告)号：US08045646B2

公开(公告)日：2011-10-25

申请号：US12094851

申请日：2006-09-11

Applicant: Pan-Soo Kim ,  Byoung-Hak Kim ,  Yun-Jeong Song ,  Deock-Gil Oh ,  Ho-Jin Lee ,  Jun Heo ,  Joong-Gon Ryoo

Inventor： Pan-Soo Kim ,  Byoung-Hak Kim ,  Yun-Jeong Song ,  Deock-Gil Oh ,  Ho-Jin Lee ,  Jun Heo ,  Joong-Gon Ryoo

IPC: H03K9/00

CPC classification number: H04L27/0014 ,  H04L2027/0057 ,  H04L2027/0067

Abstract: Provided are an apparatus for estimating a phase error and a phase error correcting system using the phase error estimating apparatus. The apparatus includes: a probability value estimating unit for estimating a negative log probability value for each transmission symbol by transforming a soft output information transferred from the outside to a log A posterior probability ratio (LAPPR) value; an APP value calculating unit for calculating a posterior probability (APP) value by applying a negative exponential function to the transmission symbol; an average value deciding unit for deciding an average value for each transmission symbol using the probability information entirely, partially, or selectively according to a probability information type; and a symbol phase estimating unit for estimating a phase of a symbol based on the decided average value.

Abstract translation: 提供了一种使用相位误差估计装置估计相位误差的装置和相位误差校正系统。 该装置包括：概率值估计单元，用于通过将从外部传送的软输出信息变换为对数A后验概率比（LAPPR）值来估计每个发送符号的负对数概率值; APP值计算单元，用于通过对发送符号应用负指数函数来计算后验概率（APP）值; 平均值确定单元，用于根据概率信息类型完全，部分或选择地使用概率信息来确定每个传输符号的平均值; 以及符号相位估计单元，用于基于所确定的平均值来估计符号的相位。

公开(公告)号：US20110164833A1

公开(公告)日：2011-07-07

申请号：US12929020

申请日：2010-12-22

Applicant: Young-Sun Jeon ,  Ho Jin Lee ,  Joon Hyuk Cha ,  Shi Hwa Lee ,  Young Su Moon ,  Hyun Sang Park

Inventor： Young-Sun Jeon ,  Ho Jin Lee ,  Joon Hyuk Cha ,  Shi Hwa Lee ,  Young Su Moon ,  Hyun Sang Park

IPC: G06K9/54

CPC classification number: G06T1/00

Abstract: An image processing apparatus is provided. The image processing apparatus for image signal processor (ISP) realization may include a Static Random Access Memory (SRAM) for each function module. A unified SRAM to store at least one line data of an input image for each of a plurality of functions modules within the image processing apparatus is further provided.

Abstract translation: 提供一种图像处理装置。 用于图像信号处理器（ISP）实现的图像处理装置可以包括用于每个功能模块的静态随机存取存储器（SRAM）。 还提供了用于存储图像处理装置内的多个功能模块中的每一个的输入图像的至少一行线数据的统一SRAM。

公开(公告)号：US20110164565A1

公开(公告)日：2011-07-07

申请号：US12996925

申请日：2008-11-05

Applicant: Nam Kyung Lee ,  Dae Lg Chang ,  Ho Jin Lee ,  Dong Jun Lee

Inventor： Nam Kyung Lee ,  Dae Lg Chang ,  Ho Jin Lee ,  Dong Jun Lee

IPC: H04W40/00

CPC classification number: H04W40/28 ,  H04L45/123 ,  H04L45/125

Abstract: A method of routing a wireless network is provided. The method is performed by each of a group of nodes and includes: receiving a routing request signal; determining whether a node itself is a destination node, by referring to a traffic distribution table showing traffic throughput of the group of nodes and an intermediate-node weight table showing weights of intermediate nodes on all paths between the group of nodes and a source node, wherein a route path is selected by referring to the weights of intermediate nodes; and when it is determined that the node itself is the destination node transmitting a routing response signal to the source node that has transmitted the routing request signal, and receiving a packet from the source node, wherein the transmitting and receiving are performed by the determined destination node. By using the method, traffic in wireless network extreme communications can be distributed at intermediate nodes as well as at destination nodes. Therefore, all the networks can be effectively used in extreme circumstances.

Abstract translation: 提供了一种路由无线网络的方法。 该方法由一组节点中的每一个执行，并且包括：接收路由请求信号; 通过参考示出节点组的流量的流量分布表和表示节点组和源节点之间的所有路径上的中间节点的权重的中间节点权重表来确定节点本身是否是目的地节点， 其中通过参考中间节点的权重来选择路由路径; 并且当确定节点本身是目的地节点向已经发送了路由请求信号的源节点发送路由响应信号，并且从源节点接收分组时，由确定的目的地执行发送和接收 节点。 通过使用该方法，可以在中间节点以及目的地节点处分配无线网络极端通信中的业务。 因此，所有网络都可以在极端情况下有效使用。

公开(公告)号：US20110142005A1

公开(公告)日：2011-06-16

申请号：US12845953

申请日：2010-07-29

Applicant: Hyun Ha HONG ,  Dae Ig Chang ,  Ho Jin Lee ,  Nam Young Kim

Inventor： Hyun Ha HONG ,  Dae Ig Chang ,  Ho Jin Lee ,  Nam Young Kim

IPC: H04W36/00

CPC classification number: H04W36/0011 ,  H04W36/14 ,  H04W36/32 ,  H04W80/04

Abstract: The present invention relates to a method of seamlessly providing a satellite multimedia Internet service to a fixed subscriber belonging to a lower user network even in a satellite shadow environment and shortening a hand-over processing time between heterogeneous networks by applying a fast layer 3 hand-over technology between satellite and wireless networks in a mobile satellite terminal device.

Abstract translation: 本发明涉及一种即使在卫星影像环境中也能固定地提供属于较低用户网络的固定用户的卫星多媒体互联网服务的方法，并且通过应用快速3层手机来缩短异构网络之间的切换处理时间， 在移动卫星终端设备中的卫星和无线网络之间的技术。

公开(公告)号：US20110113302A1

公开(公告)日：2011-05-12

申请号：US12940484

申请日：2010-11-05

Applicant: Pan Soo Kim ,  Dae Ig Chang ,  Ho Jin Lee

Inventor： Pan Soo Kim ,  Dae Ig Chang ,  Ho Jin Lee

IPC: H03M13/29 ,  G06F11/10

CPC classification number: H04L27/0008

Abstract: The present invention separates inputted triple play IP data into Internet and TV data and voice (VoIP) data, encodes the Internet and TV data permitting a long delay time according to the existing DVB-S2 standard, and encodes the voice data permitting only a short delay time according to a DVB-RCS+M standard based 4K mode. Each encoded data is subjected to the orthogonal modulation and the orthogonally modulated voice data is subjected to a direct sequence spectrum spread according to a spreading factor. The spread spectrum signal is multiplexed in a SCPC frequency division multiple access (FDMA) scheme so as to overlap with frequencies allocated to each user.

Abstract translation: 本发明将输入的三重播放IP数据分为因特网和电视数据和语音（VoIP）数据，根据现有的DVB-S2标准对允许长延迟时间的因特网和电视数据进行编码，并对只允许短暂的DVB-S2标准的语音数据进行编码 根据基于DVB-RCS + M标准的4K模式的延迟时间。 对每个编码数据进行正交调制，并且根据扩展因子对正交调制的语音数据进行直接序列频谱扩展。 扩频信号在SCPC分频多址（FDMA）方案中多路复用，以便与分配给每个用户的频率重叠。

公开(公告)号：US20110097846A1

公开(公告)日：2011-04-28

申请号：US12817304

申请日：2010-06-17

Applicant: Son-Kwan HWANG ,  In-Young Lee ,  Ho-Jin Lee ,  Dong-Hyeon Jang

Inventor： Son-Kwan HWANG ,  In-Young Lee ,  Ho-Jin Lee ,  Dong-Hyeon Jang

IPC: H01L21/50 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/9201 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10329 ,  H01L2224/05552

Abstract: A semiconductor chip comprises a substrate including a front surface and a rear surface, the substrate having a first via hole formed in the front surface and a second via hole formed in the rear surface, a first conductive plug formed on the substrate, the first conductive plug including a first portion formed in the first via hole and a second portion protruding from the front surface of the substrate, and a second conductive plug formed on the first conductive plug, the second conductive plug having a smaller cross-sectional area than the first conductive plug.

Abstract translation: 一种半导体芯片，包括：具有前表面和后表面的基板，所述基板具有形成在所述前表面上的第一通孔和形成在所述后表面中的第二通孔，形成在所述基板上的第一导电塞，所述第一导电 所述插头包括形成在所述第一通孔中的第一部分和从所述基板的前表面突出的第二部分，以及形成在所述第一导电插塞上的第二导电插塞，所述第二导电插塞具有比所述第一通孔更小的横截面积 导电插头

公开(公告)号：US07897511B2

公开(公告)日：2011-03-01

申请号：US12053478

申请日：2008-03-21

Applicant: In-Young Lee ,  Ho-Jin Lee ,  Hyun-Soo Chung ,  Ju-Il Choi ,  Son-Kwan Hwang

Inventor： In-Young Lee ,  Ho-Jin Lee ,  Hyun-Soo Chung ,  Ju-Il Choi ,  Son-Kwan Hwang

IPC: H01L21/44

CPC classification number: H01L21/76898 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2224/05552

Abstract: A method of manufacturing a semiconductor device includes forming an integrated circuit region on a semiconductor wafer. A first metal layer pattern is formed over the integrated circuit region. A via hole is formed to extend through the first metal layer pattern and the integrated circuit region. A final metal layer pattern is formed over the first metal layer pattern and within the via hole. A plug is formed within the via hole. Thereafter, a passivation layer is formed to overlie the final metal layer pattern.

Abstract translation: 一种制造半导体器件的方法包括在半导体晶片上形成集成电路区域。 在集成电路区域上形成第一金属层图案。 通孔形成为延伸穿过第一金属层图案和集成电路区域。 最终的金属层图案形成在第一金属层图案之上并且在通孔内。 在通孔内形成插头。 此后，形成钝化层以覆盖最终金属层图案。

公开(公告)号：US20100327422A1

公开(公告)日：2010-12-30

申请号：US12639241

申请日：2009-12-16

Applicant: Ho-jin LEE ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

Inventor： Ho-jin LEE ,  Dong-hyun Jang ,  In-young Lee ,  Min-seung Yoon ,  Son-kwan Hwang

IPC: H01L23/538 ,  H01L23/48 ,  H01L21/768

CPC classification number: H01L24/13 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29298 ,  H01L2224/83194 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/05552

Abstract: A semiconductor chip, a method of fabricating the same, and a stack module and a memory card including the semiconductor chip include a first surface and a second surface facing the first surface is provided. At least one via hole including a first portion extending in a direction from the first surface of the substrate to the second surface of the substrate and a second portion that is connected to the first portion and has a tapered shape. At least one via electrode filling the at least one via hole is provided.

Abstract translation: 提供一种半导体芯片及其制造方法，以及包括半导体芯片的堆叠模块和存储卡，其包括第一表面和面对第一表面的第二表面。 至少一个通孔，包括在从基板的第一表面到基板的第二表面的方向上延伸的第一部分和连接到第一部分并具有锥形形状的第二部分。 提供至少一个填充至少一个通孔的通孔电极。

公开(公告)号：US07838992B2

公开(公告)日：2010-11-23

申请号：US12496176

申请日：2009-07-01

Applicant: Hyun-Soo Chung ,  Ho-Jin Lee ,  Dong-Hyun Jang ,  Dong-Ho Lee

Inventor： Hyun-Soo Chung ,  Ho-Jin Lee ,  Dong-Hyun Jang ,  Dong-Ho Lee

IPC: H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13025 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01079 ,  H01L2924/01087

Abstract: In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability.

Abstract translation: 在具有应力消除间隔物的半导体器件封装及其制造方法中，从芯片本体延伸的金属互连指状物提供芯片互连。 金属手指通过应力消除间隔物与芯片的主体隔离。 在一个示例中，这种隔离采取气隙的形式。 在另一个实例中，这种隔离采用弹性体材料的形式。 在这两种情况下，都避免了金属互连指和芯体之间的热膨胀系数的不匹配，从而减轻了与开裂和分层相关的问题，从而提高了器件的产量和器件的可靠性。

公开(公告)号：US07831003B2

公开(公告)日：2010-11-09

申请号：US11722308

申请日：2005-11-11

Applicant: Sun-heul Ryoo ,  Do-seob Ahn ,  Ho-jin Lee

Inventor： Sun-heul Ryoo ,  Do-seob Ahn ,  Ho-jin Lee

IPC: H03D1/00

CPC classification number: H04L27/0014 ,  H03M13/2957 ,  H03M13/336 ,  H04L1/005 ,  H04L1/0066 ,  H04L25/067 ,  H04L27/22 ,  H04L2027/0028 ,  H04L2027/0067

Abstract: An apparatus and method for phase recovery in a wireless communication system employs independently decodable component codes. The apparatus includes a decoding unit for decoding the input signal to thereby output the decoding value; an estimation unit for estimating phase errors of the received signal by estimating phase errors of the each component codeword in the received signal to thereby generate phase error estimation values; and a correction unit for correcting the phase of received signal using the phase error estimation values to thereby generate the phase corrected signal in an effective manner.

Abstract translation: 无线通信系统中相位恢复的装置和方法采用可独立解码的分量代码。 该装置包括：解码单元，用于对输入信号进行解码，从而输出解码值; 估计单元，用于通过估计接收信号中的每个分量码字的相位误差来估计接收信号的相位误差，由此产生相位误差估计值; 以及校正单元，用于使用相位误差估计值校正接收信号的相位，从而以有效的方式产生相位校正信号。