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47693 条记录 (耗时 0.06 秒)

    Case for mechanical pencil leads
    23.
    外观设计
    Case for mechanical pencil leads 有权

    公开(公告)号：USD1045374S1

    公开(公告)日：2024-10-08

    申请号：US29875260

    申请日：2023-05-02

    申请人： MITSUBISHI PENCIL COMPANY, LIMITED

    设计人： Kiyoshi Fujisawa

    摘要： FIG. 1 is a front, bottom, and left side perspective view of a case for mechanical pencil leads showing the new design.
    FIG. 2 is a rear, bottom, and right side perspective view thereof.
    FIG. 3 is another front, bottom, and left side perspective view thereof showing a use state.
    FIG. 4 is a front, top, and left side perspective view thereof showing a use state.
    FIG. 5 is another rear, bottom, and right side perspective view thereof showing a use state.
    FIG. 6 is a front elevational view thereof.
    FIG. 7 is a rear elevational view thereof.
    FIG. 8 is a right side elevational view thereof.
    FIG. 9 is a left side elevational view thereof.
    FIG. 10 is a top plan view thereof.
    FIG. 11 is a bottom plan view thereof.
    FIG. 12 is another front, bottom, and left side perspective view thereof showing a use state.
    FIG. 13 is another front, top, and left side perspective view thereof showing a use state; and,
    FIG. 14 is another rear, bottom, and right side perspective view thereof showing a use state.
    The broken lines depict environmental subject matter that forms no part of the claimed design.

    Semiconductor storage device
    24.
    发明授权
    Semiconductor storage device 有权

    公开(公告)号：US12114502B2

    公开(公告)日：2024-10-08

    申请号：US18335198

    申请日：2023-06-15

    申请人： KIOXIA CORPORATION

    发明人： Hiroshi Kanno

    IPC分类号： H10B43/27 ,  H01L29/10

    CPC分类号： H10B43/27 ,  H01L29/1041

    摘要： The semiconductor storage device of an embodiment includes a first conductive layer, a stack disposed above the first conductive layer and including a plurality of second conductive layers in a first direction, and a columnar body that extends in the first direction through the stack, and includes a semiconductor layer and a charge storage film provided between the plurality of conductive layers and the semiconductor layer. A first conductive layer out of the plurality of conductive layers is connected to the semiconductor layer, and the semiconductor layer includes a first region in which a concentration of an n-type impurity is higher than a concentration of a p-type impurity, a second region in which a concentration of a p-type impurity is higher than a concentration of an n-type impurity, and a third region contacted to the first conductive layer and disposed closer to the first region than the second region in the first direction.

    Host apparatus and extension device
    28.
    发明授权
    Host apparatus and extension device 有权

    公开(公告)号：US12112788B2

    公开(公告)日：2024-10-08

    申请号：US18165565

    申请日：2023-02-07

    申请人： KIOXIA CORPORATION

    发明人： Akihisa Fujimoto

    IPC分类号： G11C11/40 ,  G11C7/22 ,  G11C11/4074 ,  G11C11/409 ,  G11C29/02 ,  G11C29/50 ,  G11C5/14

    CPC分类号： G11C11/4074 ,  G11C7/222 ,  G11C11/409 ,  G11C29/023 ,  G11C29/50004 ,  G11C5/14 ,  G11C5/144

    摘要： According to one embodiment, a first power-supply voltage is applied to I/O cells, an I/O cell connected to a clock terminal is initially set to a threshold of a second voltage signaling, an I/O cell connected to a command terminal and I/O cells connected to data terminals are initially set as an input, and when a clock control unit detects receipt of one clock pulse and a signal voltage control unit detects a host using the second voltage signaling, a signal voltage control unit drives the I/O cell of a first data terminal high level after a second power-supply voltage is applied to I/O cells and the threshold of a second voltage signaling is set to I/O cells of the clock, command and data terminals.