公开(公告)号：US07148578B2

公开(公告)日：2006-12-12

申请号：US10651813

申请日：2003-08-28

Applicant: Young-Hee Song ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

Inventor： Young-Hee Song ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/495 ,  H01L23/525 ,  H01L25/065

CPC classification number: H01L24/05 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05116 ,  H01L2224/05118 ,  H01L2224/05155 ,  H01L2224/0516 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05669 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/49113 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06558 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10161 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern. The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region. The bond pad-wiring pattern is formed substantially in a center region of the semiconductor substrate. Thus, with the embodiments of the present invention, the overall chip size can thereby be substantially reduced and an MCP can be fabricated without the problems mentioned above.

Abstract translation: 半导体芯片包括具有形成在单元区域和彼此相邻的外围电路区域的集成电路的半导体基板。 在半导体衬底上形成接合焊盘布线图形。 焊盘重排图案电连接到接合焊盘布线图案。 垫重排图案包括设置在单元区域的至少一部分上的接合焊盘。 接合焊盘布线图形基本上形成在半导体衬底的中心区域中。 因此，利用本发明的实施例，由此可以大大减小总体芯片尺寸，并且可以制造MCP而没有上述问题。

公开(公告)号：US06333606B1

公开(公告)日：2001-12-25

申请号：US09610974

申请日：2000-07-06

Applicant: Chung-Woo Lee ,  Jong-Il Eun

Inventor： Chung-Woo Lee ,  Jong-Il Eun

IPC: G05F100

CPC classification number: H05B41/2827

Abstract: A ballast for discharge lamp. The ballast for discharge lamp for utilizing high frequency voltage is generated by alternatively switching two switching elements to light the discharge lamp. The ballast includes a primary winding of a switching transformer to which the high frequency voltage is applied; a secondary winding of a switching transformer for alternatively switching the two switching elements according to reverse electromotive voltage generated by application of high frequency voltage to the primary winding; and a stabilizer for stabilizing reverse electromotive voltage generating at the secondary winding.

Abstract translation: 放电灯镇流器 通过交替地切换两个开关元件来点亮放电灯来产生用于利用高频电压的放电灯的镇流器。 镇流器包括施加高频电压的开关变压器的初级绕组; 开关变压器的次级绕组，用于根据通过向初级绕组施加高频电压产生的反向电动势来交替地切换两个开关元件; 以及用于稳定次级绕组产生反向电动势的稳定器。

公开(公告)号：US6037662A

公开(公告)日：2000-03-14

申请号：US154665

申请日：1998-09-18

Applicant: Jin-hyun Yoon ,  Chung-woo Lee

Inventor： Jin-hyun Yoon ,  Chung-woo Lee

IPC: H01L21/60 ,  H01L23/12 ,  H01L23/495 ,  H01L23/498 ,  H01L23/50 ,  H01L23/48

CPC classification number: H01L23/4985 ,  H01L23/49572 ,  H01L2924/0002

Abstract: A patterned tape attached to a semiconductor chip in a chip scale package enhances process reliability in manufacturing of the chip scale package. A shape of the beam leads concentrates stresses in the part of the beam lead where the beam lead should be disconnected during the bonding of the beam leads to the chip bonding pads, and therefore, the part to be expected to be disconnected disconnects without damaging other parts of the beam lead. In addition, the reliability of a chip scale package is enhanced, because the beam lead attached to the chip bonding pad has little chance of being damaged during bonding.

Abstract translation: 连接到芯片级封装的半导体芯片上的图案化带材增强了芯片级封装制造过程的可靠性。 光束的形状将光束引线的部分中的应力集中在光束引线的部分处，在光束引线与芯片焊盘接合期间，光束引线应断开，因此，预期断开的部分将不会损坏其他部分 部分光束引线。 此外，芯片级封装的可靠性得到提高，因为附着于芯片焊盘的光束引线几乎不会在焊接期间被损坏。

公开(公告)号：USD842775S1

公开(公告)日：2019-03-12

申请号：US29638806

申请日：2018-03-01

Applicant: Chung Woo Lee ,  Ian Richard Cartabiano ,  Naohiko Suzuki ,  Masaki Muromoto

Designer： Chung Woo Lee ,  Ian Richard Cartabiano ,  Naohiko Suzuki ,  Masaki Muromoto

公开(公告)号：USD840882S1

公开(公告)日：2019-02-19

申请号：US29638807

申请日：2018-03-01

Applicant: Chung Woo Lee ,  Ian Richard Cartabiano ,  Naohiko Suzuki ,  Masaki Muromoto

Designer： Chung Woo Lee ,  Ian Richard Cartabiano ,  Naohiko Suzuki ,  Masaki Muromoto

公开(公告)号：US08994328B2

公开(公告)日：2015-03-31

申请号：US13241135

申请日：2011-09-22

Applicant: Chung woo Lee

Inventor： Chung woo Lee

IPC: H02J7/00 ,  B60L11/18

CPC classification number: B60L11/1825 ,  B60L11/1838 ,  H02J7/0004 ,  Y02T10/7005 ,  Y02T10/7072 ,  Y02T90/121 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/16 ,  Y02T90/163

Abstract: Disclosed are an electric vehicle (EV), an EV charging stand, and a communication system therebetween, the EV including a charge control unit configured to detect a preparation state for charging a battery and output a resistance varying signal according to the detected state, and a resistor unit configured to vary a resistance value in response to the resistance varying signal, thus changing a voltage value of a state signal transmitted to the EV charging stand, and the EV charging stand including a comparator configured to receive a stage signal from the EV, compare a voltage value of the received state signal with a reference value, and output a signal in response to a result of comparing, and a control unit configured to receive the signal from the comparator and detect a preparation state for charging the battery of the EV.

Abstract translation: 公开了一种电动车辆（EV），EV充电座及其间的通信系统，所述EV包括充电控制单元，其被配置为检测用于对电池充电的准备状态并根据检测到的状态输出电阻变化信号，以及 电阻单元，被配置为响应于电阻变化信号而改变电阻值，从而改变发送到EV充电座的状态信号的电压值，并且EV充电座包括比较器，其被配置为从EV接收级信号 将接收到的状态信号的电压值与参考值进行比较，并且响应于比较结果输出信号;以及控制单元，被配置为从比较器接收信号，并检测用于对电池进行充电的准备状态 电动汽车

公开(公告)号：US20120025764A1

公开(公告)日：2012-02-02

申请号：US13193535

申请日：2011-07-28

Applicant: Chung Woo LEE

Inventor： Chung Woo LEE

IPC: H02J7/00

CPC classification number: B60L11/1816 ,  B60L3/12 ,  B60L11/1825 ,  B60L2230/16 ,  B60L2250/10 ,  B60L2270/32 ,  B60L2270/34 ,  Y02T10/7005 ,  Y02T10/7088 ,  Y02T90/121 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/163

Abstract: Disclosed is a charging stand for an electric vehicle, the charging stand including a main body, a door coupled to the main body in such a way as to be opened or closed, and an alarm device generating an alarm if the door is opened, wherein the alarm device has a door sensing unit causing a change in impedance if the door is opened, a controller receiving a signal transmitted from the door sensing unit, and a switching circuit activated by the controller to generate an alarm or store an alarm history, so that the charging stand is advantageous in that the opening of the door can be precisely detected, and the alarm history can be checked later.

Abstract translation: 公开了一种电动车辆的充电座，充电架包括主体，以打开或关闭方式联接到主体的门以及如果门打开则产生报警的报警装置，其中， 报警装置具有门检测单元，如果门打开则导致阻抗变化，控制器接收从门感测单元发送的信号，以及由控制器激活的切换电路以产生报警或存储报警历史，因此 充电台的优点在于可以精确地检测门的打开，并且可以稍后检查报警历史。

公开(公告)号：US20070108562A1

公开(公告)日：2007-05-17

申请号：US11616852

申请日：2006-12-27

Applicant: Young-Hee SONG ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

Inventor： Young-Hee SONG ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

IPC: H01L23/495

CPC classification number: H01L24/06 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05116 ,  H01L2224/05118 ,  H01L2224/05155 ,  H01L2224/0516 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05669 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2224/45099

Abstract: A semiconductor package includes a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern, The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region.

Abstract translation: 半导体封装包括具有形成在单元区域和彼此相邻的外围电路区域的集成电路的半导体衬底。 在半导体衬底上形成接合焊盘布线图形。 衬垫重排图案电连接到接合焊盘布线图案。衬垫重排图案包括设置在单元区域的至少一部分上的接合焊盘。

公开(公告)号：US06642627B2

公开(公告)日：2003-11-04

申请号：US10192800

申请日：2002-07-09

Applicant: Young-Hee Song ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

Inventor： Young-Hee Song ,  Il-Heung Choi ,  Jeong-Jin Kim ,  Hae-Jeong Sohn ,  Chung-Woo Lee

IPC: H01L2348

CPC classification number: H01L24/05 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49575 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05116 ,  H01L2224/05118 ,  H01L2224/05155 ,  H01L2224/0516 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05669 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/49113 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06558 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10161 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern. The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region. The bond pad-wiring pattern is formed substantially in a center region of the semiconductor substrate. Thus, with the embodiments of the present invention, the overall chip size can thereby be substantially reduced and an MCP can be fabricated without the problems mentioned above.

公开(公告)号：US06503941B2

公开(公告)日：2003-01-07

申请号：US10069555

申请日：2002-02-22

Applicant: Hyeong-Bae Pyo ,  Chung-Woo Lee ,  Sung-Min Park ,  Young-Ho Cho ,  Jeong-Jae Lee ,  Jin-Hwa Kim

Inventor： Hyeong-Bae Pyo ,  Chung-Woo Lee ,  Sung-Min Park ,  Young-Ho Cho ,  Jeong-Jae Lee ,  Jin-Hwa Kim

IPC: A61K748

CPC classification number: A61K8/498 ,  A61K8/63 ,  A61K2800/522 ,  A61Q5/00 ,  A61Q7/00 ,  A61Q19/00 ,  A61Q19/02 ,  A61Q19/04 ,  A61Q19/08 ,  C07D493/04

Abstract: The present invention relates to a skin cosmetic product containing 3,9-diferulylcoumestrol, especially to a skin cosmetic product containing a compound in which ferulylic acid is bonded to a coumestrol. The skin cosmetic product has several excellent effects for improving cosmetic disorders, such as anti-aging effect, whitening effect and hair-seeding effect.