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72 条记录 (耗时 0.026 秒)

    Methods of fabricating semiconductor device including phase change layer
    22.
    发明授权
    Methods of fabricating semiconductor device including phase change layer 有权
    制造包括相变层的半导体器件的方法

    公开(公告)号：US07838326B2

    公开(公告)日：2010-11-23

    申请号：US12405408

    申请日：2009-03-17

    申请人： Jin-Il Lee ,  Sung-Lae Cho ,  Ik-Soo Kim ,  Hye-Young Park ,  Do-Hyung Kim ,  Dong-Hyun Im

    发明人： Jin-Il Lee ,  Sung-Lae Cho ,  Ik-Soo Kim ,  Hye-Young Park ,  Do-Hyung Kim ,  Dong-Hyun Im

    IPC分类号： H01L21/00

    CPC分类号： H01L45/1683 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1616

    摘要： Provided are methods of fabricating a semiconductor device including a phase change layer. Methods may include forming a dielectric layer on a substrate, forming an opening in the dielectric layer and depositing, on the substrate having the opening, a phase change layer that contains an element that lowers a process temperature of a thermal treatment process to a temperature that is lower than a melting point of the phase change layer. Methods may include migrating a portion of the phase change layer from outside the opening, into the opening by the thermal treatment process that includes the process temperature that is lower than the melting point of the phase change layer.

    摘要翻译： 提供制造包括相变层的半导体器件的方法。 方法可以包括在衬底上形成电介质层，在电介质层中形成开口，并在具有开口的衬底上沉积相变层，该相变层含有将热处理工艺的工艺温度降低到 低于相变层的熔点。 方法可以包括通过包括低于相变层的熔点的工艺温度的热处理工艺将一部分相变层从开口外部迁移到开口中。

    Schottky diode and method of fabricating the same
    25.
    发明申请
    Schottky diode and method of fabricating the same 审中-公开
    肖特基二极管及其制造方法

    公开(公告)号：US20080006899A1

    公开(公告)日：2008-01-10

    申请号：US11797560

    申请日：2007-05-04

    申请人： Dae-Shik Kim ,  Oh-Kyum Kwon ,  Myung-Hee Kim ,  Yong-Chan Kim ,  Hye-Young Park ,  Joon-Suk Oh

    发明人： Dae-Shik Kim ,  Oh-Kyum Kwon ,  Myung-Hee Kim ,  Yong-Chan Kim ,  Hye-Young Park ,  Joon-Suk Oh

    IPC分类号： H01L29/47 ,  H01L21/28

    CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/47 ,  H01L29/66143

    摘要： A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may, be formed under a portion of the schottky junction.

    摘要翻译： 肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。 该井可具有第一导电类型。 第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。 第一结区可能具有比阱更高的第一导电类型的浓度。 可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。 可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。 可以在肖特基结的一部分下方形成阱护罩的至少一部分。

    METHOD OF PROGRAMMING EEPROM HAVING SINGLE GATE STRUCTURE
    26.
    发明申请
    METHOD OF PROGRAMMING EEPROM HAVING SINGLE GATE STRUCTURE 审中-公开
    具有单门结构的EEPROM编程方法

    公开(公告)号：US20070148851A1

    公开(公告)日：2007-06-28

    申请号：US11608529

    申请日：2006-12-08

    申请人： Myung-hee Kim ,  Geun-sook Park ,  Sang-bae Yi ,  Ho-ik Hwang ,  Hye-young Park

    发明人： Myung-hee Kim ,  Geun-sook Park ,  Sang-bae Yi ,  Ho-ik Hwang ,  Hye-young Park

    IPC分类号： H01L21/8238

    CPC分类号： G11C16/0416 ,  G11C2216/10 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11558

    摘要： A method of programming an EEPROM including a first active region, a second active region and a third active region located separately in a semiconductor substrate, a common floating gate above and intersecting the active regions, first impurity regions located at both sides of the common floating gate in the first active region, second impurity regions located at both sides of the common floating gate in the second active regions and third impurity region, located at both sides of the common floating gate in the third active region. The method includes: applying a programming voltage to the first impurity regions in the first active region and the third impurity regions in the third active region; and applying a ground voltage to the second impurity regions in the second active region.

    摘要翻译： 一种编程EEPROM的方法，包括分别位于半导体衬底中的第一有源区，第二有源区和第三有源区，位于有源区之上并与有源区相交的公共浮栅，位于公共浮置的两侧的第一杂质区 位于第一有源区中的栅极，位于第二有源区域中的公共浮置栅极两侧的第二杂质区域和位于第三有源区域中的公共浮置栅极两侧的第三杂质区域。 该方法包括：对第一有源区中的第一杂质区和第三有源区中的第三杂质区施加编程电压; 以及对第二有源区中的第二杂质区施加接地电压。

    Dispersion shifted optical fiber having triple clad
    27.
    发明授权
    Dispersion shifted optical fiber having triple clad 失效
    具有三重包层的色散位移光纤

    公开(公告)号：US06516125B1

    公开(公告)日：2003-02-04

    申请号：US09622521

    申请日：2000-08-17

    申请人： Hye Young Park ,  Kwon Moo Lee ,  Joon Hyung Cho

    发明人： Hye Young Park ,  Kwon Moo Lee ,  Joon Hyung Cho

    IPC分类号： G02B602

    CPC分类号： G02B6/02014 ,  G02B6/02271 ,  G02B6/0281 ,  G02B6/03611 ,  G02B6/03638

    摘要： The present invention is related to a dispersion-shifted optical fiber for use in a wavelength division multiplexing system, which comprises a core, an inner clad, and a silica clad, wherein the optical fiber has a relatively low dispersion at a wavelength of 1550 nm, an effective area of 60 &mgr;m2 and small bending loss. The core consists of a first and a second core, wherein the core has a refractive index distribution. The inner clad consists of a first inner clad having a refractive index smaller than that of the second core and a second inner clad having a refractive index smaller than that of the second inner clad. A silica clad surrounds the inner clad and has a refractive index smaller than that of the second inner clad.

    摘要翻译： 本发明涉及一种波分复用系统中使用的色散位移光纤，其包括芯，内包层和二氧化硅包层，其中光纤在波长1550nm处具有较低的色散 ，有效面积为60mum2，弯曲损耗小。 芯由第一和第二芯组成，其中芯具有折射率分布。 内包层由折射率小于第二芯的折射率的第一内包层和比第二内包层的折射率小的第二内包层组成。 二氧化硅包层包围内包层，折射率小于第二内包层的折射率。