Method of programming a non-volatile memory device
    21.
    发明授权
    Method of programming a non-volatile memory device 有权
    编程非易失性存储器件的方法

    公开(公告)号:US07911823B2

    公开(公告)日:2011-03-22

    申请号:US12123827

    申请日:2008-05-20

    CPC分类号: G11C11/36

    摘要: A method of programming a non-volatile memory device with memory cells formed of variable resistance elements and disposed between word lines and bit lines, includes: previously charging a selected word line and a selected bit line together with a non-selected word line and a non-selected bit line up to a certain voltage; and further charging the selected word line and the non-selected bit line up to a program voltage higher than the certain voltage and a program-block voltage, respectively, and simultaneously discharging the selected bit line.

    摘要翻译: 一种使用由可变电阻元件形成并且设置在字线和位线之间的存储单元来编程非易失性存储器件的方法包括:预先对所选择的字线和所选择的位线以及未选择的字线和 非选择位线达到一定电压; 并且进一步对所选字线和未选择的位线进行充电,直到分别高于特定电压和编程块电压的编程电压,并同时对所选择的位线进行放电。

    Semiconductor memory device and semiconductor memory system
    22.
    发明授权
    Semiconductor memory device and semiconductor memory system 有权
    半导体存储器件和半导体存储器系统

    公开(公告)号:US07876626B2

    公开(公告)日:2011-01-25

    申请号:US12408232

    申请日:2009-03-20

    IPC分类号: G11C7/00

    摘要: A semiconductor memory device comprises a memory cell array including a plurality of memory cells arranged at intersections of word lines and bit lines; a read/write circuit operative to execute data read/write to the memory cell; and an operational circuit operative to compare certain length data read out by the read/write circuit from plural ones of the memory cells with certain length data to be written in the plural memory cells to make a decision, and create a flag representing the decision result. The read/write circuit inverts each bit in the certain length data to be written in the memory cells in accordance with the flag, and writes only rewrite-intended data of the certain length data and the flag. The read/write circuit reads the certain length data together with the flag corresponding thereto, and inverts each bit in the certain length data in accordance with the flag.

    摘要翻译: 半导体存储器件包括存储单元阵列,其包括布置在字线和位线的交点处的多个存储单元; 读/写电路,用于执行对存储器单元的数据读/写; 以及操作电路,用于将来自多个存储器单元的读/写电路读出的某些长度数据与要写入多个存储器单元的一定长度数据进行比较,并作出决定,并创建表示决定结果的标志 。 读/写电路根据该标志反转要写入存储单元的一定长度数据中的每个位,并且仅写入特定长度数据和标志的重写预期数据。 读/写电路读取与其对应的标志一定的长度数据,并根据该标志反转一定长度数据中的每一位。

    Non-volatile memory device and method of reading data therefrom
    23.
    发明授权
    Non-volatile memory device and method of reading data therefrom 有权
    非易失性存储器件以及从其读取数据的方法

    公开(公告)号:US07835174B2

    公开(公告)日:2010-11-16

    申请号:US12266884

    申请日:2008-11-07

    申请人: Naoya Tokiwa

    发明人: Naoya Tokiwa

    IPC分类号: G11C11/00

    摘要: The present invention provides a method of reading data from a non-volatile memory device including word lines and bit lines that intersect each other and electrically rewritable memory cells that are arranged at intersections of the word lines and the bit lines and that respectively have variable resistive elements nonvolatily storing a resistances as data. The method includes: precharging a selected word line and unselected word lines to a first word line voltage and a selected bit line and unselected bit lines to a first bit line voltage; and reading data from a memory cell connected to the selected word line and the selected bit line by changing the voltage of the selected word line from the first word line voltage to a second word line voltage and changing the voltage of the selected bit line from the first bit line voltage to a second bit line voltage after the precharging.

    摘要翻译: 本发明提供了一种从非易失性存储器件读取数据的方法,该非易失性存储器件包括彼此相交的字线和位线,以及布置在字线和位线的交点处并分别具有可变电阻的电可重写存储器单元 元素非电容地存储电阻作为数据。 该方法包括:将所选择的字线和未选择的字线预充电到第一字线电压,将所选择的位线和未选择的位线预充电到第一位线电压; 以及通过将所选择的字线的电压从第一字线电压改变为第二字线电压,并将所选择的位线的电压从第一字线电压改变而从连接到所选择的字线和所选位线的存储单元读取数据 在预充电之后的第一位线电压到第二位线电压。

    Non-volatile memory device
    24.
    发明授权
    Non-volatile memory device 有权
    非易失性存储器件

    公开(公告)号:US07817457B2

    公开(公告)日:2010-10-19

    申请号:US12132972

    申请日:2008-06-04

    IPC分类号: G11C11/00

    摘要: According to one embodiment, a nonvolatile memory device includes: a memory cell array including memory cells each having a variable resistance element for nonvolatilely storing data identified by an electrically rewritable resistance value; a first data latch storing write and erase data to be written on a given group of memory cells of the memory cell array for a write and erase operation; and a second data latch storing reference data for performing a compensation operation of the given group to compensate write and erase disturbance accompanied by the write or erase operation.

    摘要翻译: 根据一个实施例,非易失性存储器件包括:存储单元阵列,其包括各自具有用于非易失性地存储由电可重写电阻值识别的数据的可变电阻元件的存储单元; 存储要写入存储单元阵列的给定组的存储单元的用于写入和擦除操作的写入和擦除数据的第一数据锁存器; 以及第二数据锁存器,存储用于执行给定组的补偿操作以补偿伴随着写入或擦除操作的写入和擦除干扰的参考数据。

    NON-VOLATILE SEMICONDUCTOR STORAGE SYSTEM
    25.
    发明申请
    NON-VOLATILE SEMICONDUCTOR STORAGE SYSTEM 有权
    非挥发性半导体存储系统

    公开(公告)号:US20100034025A1

    公开(公告)日:2010-02-11

    申请号:US12507366

    申请日:2009-07-22

    IPC分类号: G11C16/04 G11C7/00 G11C29/00

    CPC分类号: G11C16/349

    摘要: There is provided a non-volatile memory having electrically rewritable non-volatile memory cells arranged therein. A controller controls operation at the non-volatile memory. The non-volatile memory comprises a status output section configured to output status information indicating a status of read operation, write operation or erase operation in the non-volatile memory cell. The controller comprises a control signal generating section configured to output a control signal for a certain operation in the non-volatile memory, and a control signal switching section configured to instruct the control signal generating section to switch the control signal based on the status information.

    摘要翻译: 提供了一种其中布置有电可重写非易失性存储单元的非易失性存储器。 控制器控制非易失性存储器的操作。 非易失性存储器包括状态输出部分,被配置为在非易失性存储器单元中输出指示读取操作,写入操作或擦除操作的状态的状态信息。 所述控制器包括:控制信号生成部,被配置为输出用于所述非易失性存储器中的某个操作的控制信号;以及控制信号切换部,被配置为指示所述控制信号生成部基于所述状态信息来切换所述控制信号。

    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
    26.
    发明申请
    NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号:US20090154237A1

    公开(公告)日:2009-06-18

    申请号:US12277698

    申请日:2008-11-25

    申请人: Naoya TOKIWA

    发明人: Naoya TOKIWA

    摘要: A non-volatile semiconductor memory device includes: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a first register group configured to store control data used for controlling memory operations; an adjusting data storage area defined in the memory cell array so as to store adjusting data used for adjusting the control data; and a second register group configured to store the adjusting data read from the adjusting data storage area.

    摘要翻译: 非易失性半导体存储器件包括:具有布置在其中的电可重写和非易失性存储单元的存储单元阵列; 配置为存储用于控制存储器操作的控制数据的第一寄存器组; 在所述存储单元阵列中定义的调整数据存储区域,以存储用于调整所述控制数据的调整数据; 以及第二寄存器组,被配置为存储从调整数据存储区域读取的调整数据。

    SEMICONDUCTOR STORAGE DEVICE
    29.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 有权
    半导体存储设备

    公开(公告)号:US20080170435A1

    公开(公告)日:2008-07-17

    申请号:US12015755

    申请日:2008-01-17

    IPC分类号: G11C16/34

    摘要: A memory cell array has a plurality of multi-value memory cells arranged therein that can store information of two bits or more in one memory cell as a different page. In each of the data registers, an acceptable number setting register, which temporarily retains data read from the memory cell array, stores multiple acceptable numbers of data states corresponding to each state of threshold voltages of each of the pages in the multi-value memory cells. A selector selects, from the multiple acceptable numbers of data states, an acceptable number of data states for data retained in each of the data registers corresponding to each page of the multi-value memory cells. A comparator compares the number of data states retained in each of the data registers with the acceptable number of data states selected by the selector.

    摘要翻译: 存储单元阵列具有布置在其中的多个多值存储器单元,其可以将一个存储单元中的两位或更多位的信息存储为不同的页。 在每个数据寄存器中,临时保存从存储单元阵列读取的数据的可接受数量设置寄存器存储与多值存储器单元中的每个页的阈值电压的每种状态相对应的多个可接受数量的数据状态 。 选择器从多个可接受数量的数据状态中选择对应于多值存储器单元的每一页的每个数据寄存器中保留的数据的可接受数量的数据状态。 比较器将每个数据寄存器中保留的数据状态数与选择器选择的可接受的数据状态数进行比较。

    SEMICONDUCTOR MEMORY DEVICE
    30.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20080123410A1

    公开(公告)日:2008-05-29

    申请号:US11773280

    申请日:2007-07-03

    IPC分类号: G11C11/34

    摘要: A semiconductor memory device includes: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a row decoder configured to select a memory cell in the memory cell array, the row decoder including a flag latch, in which a bad block flag is set for a bad block in the memory cell array; a sense amplifier configured to sense data of a selected memory cell in the memory cell array; and an output circuit configured to output read data in the sense amplifier, the output circuit including an output data fixing circuit configured to fix an output data at a logic level in accordance with the bad block flag.

    摘要翻译: 半导体存储器件包括:具有布置在其中的电可重写和非易失性存储单元的存储单元阵列; 行解码器,其被配置为选择存储单元阵列中的存储单元,所述行解码器包括标志锁存器,其中对所述存储单元阵列中的坏块设置坏块标志; 感测放大器,被配置为感测所述存储器单元阵列中的选定存储单元的数据; 以及输出电路,被配置为在所述读出放大器中输出读取数据,所述输出电路包括输出数据固定电路,其被配置为根据所述坏块标志将输出数据固定在逻辑电平。