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    System and method for determining vulnerability metrics for graph-based configuration security
    23.
    发明授权
    System and method for determining vulnerability metrics for graph-based configuration security 有权

    公开(公告)号：US11930046B2

    公开(公告)日：2024-03-12

    申请号：US17350221

    申请日：2021-06-17

    Applicant: Palo Alto Research Center Incorporated

    Inventor： Massimiliano Albanese ,  Marc E. Mosko

    IPC: H04L29/00 ,  H04L9/40

    CPC classification number: H04L63/205 ,  H04L63/1433

    Abstract: A system is provided for determining vulnerability metrics for graph-based configuration security. During operation, the system generates a multi-layer graph for a system with a plurality of interconnected components. The system determines, based on the multi-layer subgraph, a model for a multi-step attack on the system by: calculating, based on a first set of variables and a first set of tunable parameters, a likelihood of exploiting a vulnerability in the system; and calculating, based on a second set of variables and a second set of tunable parameters, an exposure factor indicating an impact of exploiting a vulnerability on the utility of an associated component. The system determines, based on the model, a set of attack paths that can be used in the multi-step attack and recommends a configuration change in the system, thereby facilitating optimization of system security to mitigate attacks on the system while preserving system functionality.

    METHOD AND ARCHITECTURE FOR PROVIDING INTEGRATED DESIGN OF CYBER-PHYSICAL SYSTEM WITH WATERMARKING
    25.
    发明公开
    METHOD AND ARCHITECTURE FOR PROVIDING INTEGRATED DESIGN OF CYBER-PHYSICAL SYSTEM WITH WATERMARKING 审中-公开

    公开(公告)号：US20240080325A1

    公开(公告)日：2024-03-07

    申请号：US17939577

    申请日：2022-09-07

    Applicant: Palo Alto Research Center Incorporated

    Inventor： Raman Goyal ,  Christoforos Somarakis ,  Erfaun Noorani ,  Aleksandar B. Feldman ,  Shantanu Rane

    IPC: H04L9/40

    CPC classification number: H04L63/1416 ,  H04L63/1425 ,  H04L63/145 ,  H04L63/30

    Abstract: Embodiments described herein provide a design architecture for co-designing a controller and a watermarking signal for a cyber-physical system. During operation, the architecture can determine, in conjunction with each other, respective values of a first set of parameters indicating operations of the controller and a second set of parameters representing the watermarking signal. Here, the watermarking signal is combinable with a control signal from the controller for monitoring an output signal of the cyber-physical system for detecting malicious data at different time instances. Subsequently, the architecture can determine a state manager for determining the states of the cyber-physical system from the monitored output signal based on the first and second sets of parameters. The architecture can also determine a detector capable of identifying presence of an attack from the states of the cyber-physical system at a plurality of time instances using the watermarking signal.

    SYSTEM AND METHOD USING IMPROVED MESSAGE QUEUE AND PACKING SCHEME FOR ELECTRONIC DEVICE
    26.
    发明公开
    SYSTEM AND METHOD USING IMPROVED MESSAGE QUEUE AND PACKING SCHEME FOR ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240073152A1

    公开(公告)日：2024-02-29

    申请号：US17898985

    申请日：2022-08-30

    Applicant: Palo Alto Research Center Incorporated

    Inventor： Eric D. COCKER ,  Matthew A. SHREVE ,  Francisco E. TORRES

    IPC: H04L47/6275 ,  G06N5/02 ,  H04L43/06 ,  H04L47/56 ,  H04L69/22

    CPC classification number: H04L47/6275 ,  G06N5/022 ,  H04L43/06 ,  H04L47/564 ,  H04L69/22

    Abstract: A system and method provide a combination of a modular message structure, a priority-based message packing scheme, and a data packet queue management system to optimize the information content of a transmitted message in, for example, the Ocean of Things (OoT) environment. The modular message structure starts with a header that provides critical information and reference points for time and location. The rest of the message is composed of modular data packets, each of which has a data ID section that the message decoder uses for reference when reconstructing the message contents, an optional size section that specifies the length of the following data section if it can contain data of variable length, and a data section that can be compressed in a manner unique to that data type. The message packing scheme uses a combination of priority level and minimum reporting interval, both of which are dynamically configurable for each data packet type, to maximize the value of the information contained in the modular data packets included in each message. Finally, the data packet queues manage temporary storage of data packets that have been generated but not yet included in an outgoing message.

    SYSTEM AND METHOD INCORPORATING MODULAR DATA ENCRYPTION FOR AN ELECTRONIC DEVICE
    27.
    发明公开
    SYSTEM AND METHOD INCORPORATING MODULAR DATA ENCRYPTION FOR AN ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240072991A1

    公开(公告)日：2024-02-29

    申请号：US17898826

    申请日：2022-08-30

    Applicant: Palo Alto Research Center Incorporated

    Inventor： Francisco E. TORRES ,  Eric D. COCKER

    IPC: H04L9/00 ,  G01S19/16

    CPC classification number: H04L9/008 ,  G01S19/16 ,  H04L2209/805

    Abstract: A system and method are provided wherein encrypted data is stored in modular lockers on a first storage volume associated with a high-power microprocessor deployed in a system. Each encrypted locker maps, for example, to a specific time segment (e.g., one day) which simplifies mounting of the encrypted volume for data access and reduces the locker size for external access of data while encrypted (e.g., via Wifi). New data in a second storage volume associated with and generated by a low-power microprocessor associated with the system gets transferred to the encrypted data store during wake cycles of the high-power microprocessor. To manage space on the first storage volume, time stamps associated with each encrypted locker allows simple removal of files older than a specified time period by removing of any encrypted lockers older than that threshold.

    TOPOLOGY OPTIMIZATION WITH LOCALLY DIFFERENTIABLE COMPLEMENT SPACE CONNECTIVITY
    28.
    发明公开
    TOPOLOGY OPTIMIZATION WITH LOCALLY DIFFERENTIABLE COMPLEMENT SPACE CONNECTIVITY 审中-公开

    公开(公告)号：US20240061965A1

    公开(公告)日：2024-02-22

    申请号：US18086048

    申请日：2022-12-21

    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED

    Inventor： Clinton Morris ,  Amirmassoud Mirzendehdel ,  Morad Behandish

    IPC: G06F30/10 ,  G06F30/23

    CPC classification number: G06F30/10 ,  G06F30/23 ,  G06F2111/04

    Abstract: One or more physical constraints are selected from a plurality of physical constraints for a part. The physical constraints are for use by a physics solver and define a physical performance of the part. One or more connectivity constraints are defined for use by the physics solver. The connectivity constraints enforce connectivity to or from at least one region over a complement space of the part. The connectivity constraints include locally differentiable violation measures that are modeled after at least one of the physical constraints. A topology of the part is optimized in the physics solver by enforcing the physical constraints and the connectivity constraints while satisfying a primary objective function that optimizes the physical performance of the part. A computer-aided design of the part is produced based on the optimized topology.

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