公开(公告)号：US20100118280A1

公开(公告)日：2010-05-13

申请号：US12346799

申请日：2008-12-30

申请人： CHIEN-FU CHEN ,  WEI-PING HSU

发明人： CHIEN-FU CHEN ,  WEI-PING HSU

IPC分类号： G03B21/16 ,  F21K7/00

CPC分类号： G03B21/16

摘要： A light-source module includes a red light source, a blue light source, a green light source, a first heat sink, and a second heat sink. The first heat sink is attached to the green light source for dissipating heat generated from the green light source. The second heat sink is attached to the red light source and the blue light source for dissipating heat generated from the red light source and the blue light source. The first heat sink is separated from the second heat sink.

摘要翻译： 光源模块包括红色光源，蓝色光源，绿色光源，第一散热器和第二散热器。 第一散热器连接到绿色光源，用于散发由绿色光源产生的热量。 第二散热器附接到红色光源和蓝色光源，用于散发从红色光源和蓝色光源产生的热量。 第一散热器与第二散热器分离。

公开(公告)号：US20100111089A1

公开(公告)日：2010-05-06

申请号：US12611206

申请日：2009-11-03

申请人： Yung Ping Hsu ,  Yuh-Ren Jauh ,  Chao-Chun Wang

发明人： Yung Ping Hsu ,  Yuh-Ren Jauh ,  Chao-Chun Wang

IPC分类号： H04L12/56

CPC分类号： H04W28/18 ,  H01Q3/26 ,  H01Q3/30 ,  H04B7/0619 ,  H04B7/0634 ,  H04B7/0639 ,  H04B7/0663 ,  H04B7/0695 ,  H04B7/088

摘要： A communication system is provided. A first communications device transmits at least one first message including predetermined bit sequences. A second communications device determines one or more antenna weighting vectors (AWVs) and one or more bitloading vectors (BLVs) by using the first message in accordance with a predetermined rule and transmits a second message including information pertinent to the AWVs and the BLVs to the first communications device. The first communications device further communicates with the second communications device about an AWV selected from the AWVs and the first and second communications devices apply the selected AWV to the corresponding antennas before exchanging data. The data includes a header carrying information pertinent to a BLV selected from the BLVs used to encode the data and a payload is transmitted to the second communications device. The second communications device decodes the data in accordance with the selected BLV.

摘要翻译： 提供通信系统。 第一通信设备发送包括预定比特序列的至少一个第一消息。 第二通信设备根据预定规则通过使用第一消息来确定一个或多个天线加权向量（AWV）和一个或多个比特加载向量（BLV），并将包括与AWV和BLV相关的信息的第二消息发送到 第一通信设备。 第一通信设备还与第二通信设备进一步通信从AWV中选择的AWV，并且第一和第二通信设备在交换数据之前将所选择的AWV应用于对应的天线。 该数据包括一个标题，该报头携带与从用于编码数据的BLV中选择的BLV有关的信息，并且有效载荷被发送到第二通信设备。 第二通信设备根据所选择的BLV对数据进行解码。

公开(公告)号：US20100108462A1

公开(公告)日：2010-05-06

申请号：US12264256

申请日：2008-11-04

申请人： Jyh-Chyang Hsieh ,  Yueh-Ping Hsu ,  Tien-Yuan Chien

发明人： Jyh-Chyang Hsieh ,  Yueh-Ping Hsu ,  Tien-Yuan Chien

IPC分类号： G07F7/04

CPC分类号： G07F7/04 ,  G06Q20/40145 ,  G07C9/00031 ,  G07F9/026

摘要： A bill acceptor for use with an automatic vending machine is disclosed to include a body having a bill/license insertion slot and a passage extending backwards from the bill/license insertion slot, and a circuit assembly, which includes a bill recognition unit for checking the authenticity and par value of a bill, a license recognition unit for checking the authenticity obtaining a predetermined data of a license, a communication interface module for data communication between the bill recognition unit/license recognition unit and the automatic vending machine, and a power-saving power supply module electrically connected with the communication interface module for controlling the automatic vending machine to enter the sleep mode when the automatic b vending machine is not used within a predetermined time period after startup and for providing power supply to wake up the automatic vending machine upon insertion of a bill/license and recognition of the authenticity of the inserted bill/license.

摘要翻译： 公开了一种与自动售货机一起使用的纸币接收器，包括具有纸币/许可证插入槽和从纸币/许可插入槽向后延伸的通道的主体，以及电路组件，其包括用于检查 账单的真实性和面值，用于检查获得许可证的预定数据的真实性的许可证识别单元，用于账单识别单元/许可证识别单元和自动售货机之间的数据通信的通信接口模块， 与所述通信接口模块电连接的节电电源模块，用于当在启动之后的预定时间段内不使用所述自动售货机时，控制所述自动售货机进入睡眠模式，并且用于提供电源以唤醒所述自动售货机 在插入帐单/许可证和承认所插入的帐单/ 执照。

公开(公告)号：US20100026723A1

公开(公告)日：2010-02-04

申请号：US12183786

申请日：2008-07-31

申请人： H. Keith Nishihara ,  Shi-Ping Hsu ,  Adrian Kaehler ,  Eric Gradman ,  Kjerstin Williams

发明人： H. Keith Nishihara ,  Shi-Ping Hsu ,  Adrian Kaehler ,  Eric Gradman ,  Kjerstin Williams

IPC分类号： G09G5/00

CPC分类号： G06F3/04886 ,  G06F2203/04805

摘要： One embodiment of the invention includes a computer interface system. The system comprises a user interface screen configured to display visual content and an input system configured to detect a presence of an input object within a threshold distance along a normal axis of the user interface screen. The system further comprises a graphical controller configured to magnify a portion of the visual content that is located at an approximate location of a base of the normal axis on the user interface screen.

摘要翻译： 本发明的一个实施例包括计算机接口系统。 该系统包括被配置为显示可视内容的用户界面屏幕和被配置为沿着用户界面屏幕的法线轴在阈值距离内检测输入对象的存在的输入系统。 该系统还包括图形控制器，该图形控制器被配置为放大位于用户界面屏幕上的法线的基座的大致位置处的视觉内容的一部分。

公开(公告)号：US07656040B2

公开(公告)日：2010-02-02

申请号：US11756403

申请日：2007-05-31

申请人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

发明人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/19041 ,  H05K1/186 ,  H05K3/323 ,  H05K3/4602 ,  H05K3/4614 ,  H05K2201/09536 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stack structure of circuit boards embedded with semiconductor components therein is proposed, which includes at least two semiconductor components embedded circuit boards, a plurality of conductive bumps, and at least one adhesive layer. The circuit boards are each formed with a circuit layer having a plurality of electrical connection pads. The conductive bumps are formed on the electrical connection pads of at least one of the circuit boards. The adhesive layer is formed between the circuit boards such that a portion of the adhesive layer between the conductive bumps and the electrical connection pads, or between the opposing conductive bumps, forms a conductive channel and thereby forms an electrical connection between the circuit boards.

摘要翻译： 提出了嵌入其中的半导体部件的电路板的堆叠结构，其包括至少两个半导体部件嵌入式电路板，多个导电凸块和至少一个粘合剂层。 电路板各自形成有具有多个电连接焊盘的电路层。 导电凸块形成在至少一个电路板的电连接焊盘上。 粘合剂层形成在电路板之间，使得导电凸块和电连接焊盘之间或相对的导电凸块之间的粘合剂层的一部分形成导电通道，从而在电路板之间形成电连接。

公开(公告)号：US07650255B2

公开(公告)日：2010-01-19

申请号：US12114551

申请日：2008-05-02

申请人： Chi Tsung Lee ,  Sheng Pin Chen ,  Ming Chuan You ,  Shou Ping Hsu

发明人： Chi Tsung Lee ,  Sheng Pin Chen ,  Ming Chuan You ,  Shou Ping Hsu

IPC分类号： G01R31/14

CPC分类号： G01R31/2894 ,  G01R31/01 ,  G01R31/2893

摘要： A method of multi-site testing a batch of semiconductor units using a multi-site automated tester (100). The tester (300) includes a handler (320) coupled to a contactor (330) including a first plurality of contact sites. The method includes the step of loading the first plurality of units into the first plurality of contact sites (201). The first plurality of units are simultaneously tested (202) using a test program to determine bin information for each of the first plurality of units, wherein the bin information defines each of the first plurality units as being a passed unit or a reject unit. The passed units are offloaded from respective contact sites of the first plurality of contact sites to create vacant contact sites (203), while keeping the reject unit(s) at respective contact sites of the first plurality of contact sites. Untested units from the batch are then loaded to fill the vacant contact sites (204). Simultaneously, the reject units retested and untested units are tested using the test program (205).

摘要翻译： 使用多站点自动化测试仪（100）对一批半导体单元进行多站点测试的方法。 测试器（300）包括耦合到包括第一多个接触位置的接触器（330）的处理器（320）。 该方法包括将第一多个单元加载到第一多个接触位置（201）中的步骤。 使用测试程序同时测试第一多个单元（202），以确定第一多个单元中的每个单元的箱信息，其中箱信息将第一多个单元中的每个单元定义为通过单元或拒绝单元。 通过的单元从第一多个接触位置的相应接触位置卸载以创建空的接触位置（203），同时将排除单元保持在第一多个接触位置的相应接触位置处。 然后加载来自批次的未测试单元以填充空的接触位点（204）。 同时，使用测试程序（205）测试拒绝单元重新测试和未测试单元。

公开(公告)号：US07639473B2

公开(公告)日：2009-12-29

申请号：US11925590

申请日：2007-10-26

申请人： Shih-Ping Hsu ,  Kan-Jung Chia

发明人： Shih-Ping Hsu ,  Kan-Jung Chia

IPC分类号： F23Q3/00

CPC分类号： H05K1/185 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24227 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/0315 ,  H01L2924/00

摘要： A circuit board structure with embedded electronic components includes: a carrier board having an adhesive layer with two surfaces formed with first and second metal oxide layers covered by first and second metal layers and having at least one through hole; at least one semiconductor chip received in the through hole of the carrier board; an adhesive material filling a gap between the through hole and the semiconductor chip so as to secure the semiconductor chip in position to the through hole; a high dielectric material layer formed outwardly on the second metal layer; and at least one electrode board formed outwardly on the high dielectric material layer such that a capacitance component is formed with the second metal layer, high dielectric material layer, and electrode board. Accordingly, the capacitance component is integrated into the circuit board structure.

摘要翻译： 具有嵌入式电子元件的电路板结构包括：具有粘合剂层的载体板，其具有形成有由第一和第二金属层覆盖并且具有至少一个通孔的第一和第二金属氧化物层的两个表面; 至少一个半导体芯片容纳在载板的通孔中; 填充通孔和半导体芯片之间的间隙的粘合材料，以将半导体芯片固定在通孔的适当位置; 在第二金属层上向外形成的高介电材料层; 以及至少一个在高电介质材料层上向外形成的电极板，使得电容元件形成有第二金属层，高介电材料层和电极板。 因此，电容分量被集成到电路板结构中。

公开(公告)号：US20090294993A1

公开(公告)日：2009-12-03

申请号：US12153914

申请日：2008-05-28

申请人： Shih-Ping Hsu

发明人： Shih-Ping Hsu

IPC分类号： H01L23/52

CPC分类号： H01L23/49827 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K3/285 ,  H05K3/3452 ,  H05K3/4644 ,  H05K2201/0195 ,  H01L2924/00

摘要： A packaging substrate structure is disclosed, which comprises a dielectric material with Young's Modulus less than 1 Gpa and moisture absorption ratio less than 1.0% in a solder mask, an outer dielectric layer or the combination. The package substrate structure improves the stability and the integration of the product.

摘要翻译： 公开了一种包装衬底结构，其包括在焊料掩模，外部电介质层或组合中具有小于1Gpa的杨氏模量和小于1.0％的吸湿率的介电材料。 封装衬底结构提高了产品的稳定性和集成度。

公开(公告)号：US07614146B2

公开(公告)日：2009-11-10

申请号：US11867660

申请日：2007-10-04

申请人： Shih-Ping Hsu

发明人： Shih-Ping Hsu

IPC分类号： H05K3/42

CPC分类号： H05K3/427 ,  H05K1/116 ,  H05K3/108 ,  H05K3/426 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2203/0353 ,  Y10T29/49123 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49163 ,  Y10T29/49165

摘要： The present invention provides a circuit board structure and a method of fabricating circuit board structure the same, the circuit board structure consisting of a carrier board having a first surface and an opposed second surface, the carrier board being formed with at least one through hole penetrating the first and second surfaces; a conductive pillar formed in the through hole by electroplating; and a first circuit layer and a second circuit layer respectively formed on the first and second surfaces of the carrier board, the first and second circuit layers being electrically connected to the two end portions of the conductive pillar, thereby reducing spacing between adjacent conductive pillars of the carrier board and achieving high density circuit layout.

摘要翻译： 本发明提供一种电路板结构及其制造方法，所述电路板结构由具有第一表面和相对的第二表面的载体板组成，所述载体板形成有至少一个穿透孔 第一和第二表面; 通过电镀形成在通孔中的导电柱; 以及分别形成在所述载板的所述第一和第二表面上的第一电路层和第二电路层，所述第一和第二电路层电连接到所述导电柱的两个端部，由此减小相邻导电柱之间的间隔 承载板实现高密度电路布局。

公开(公告)号：US20090168380A1

公开(公告)日：2009-07-02

申请号：US12340445

申请日：2008-12-19

申请人： Shih-Ping Hsu ,  Kan-Jung Chia

发明人： Shih-Ping Hsu ,  Kan-Jung Chia

IPC分类号： H05K1/18

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/18162 ,  H05K3/4644 ,  H05K2201/10674 ,  H05K2203/072 ,  H05K2203/1469

摘要： A package substrate embedded with a semiconductor component is provided. A semiconductor chip is received in a cavity of a substrate body, and has electrode pads on an active surface thereof. A passivation layer is disposed on the active surface and has openings for exposing the electrode pads. An electroless plating metal layer, a first sputtering metal layer and a second sputtering metal layer are sequentially formed on the electrode pads, the openings of the passivation layer and the passivation layer surface around the openings. Contact pads are formed on the second sputtering metal layer. A first dielectric layer is disposed on the substrate body and the passivation layer. A first circuit layer is formed on the first dielectric layer. First conductive vias are formed in the first dielectric layer and electrically connected to the contact pads. The first circuit layer is electrically connected to the first conductive vias.

摘要翻译： 提供了嵌入半导体部件的封装基板。 半导体芯片被接收在基板主体的空腔中，并且在其有效表面上具有电极焊盘。 钝化层设置在有源表面上并具有用于暴露电极焊盘的开口。 在电极焊盘，钝化层的开口和开口周围的钝化层表面上依次形成化学镀金属层，第一溅射金属层和第二溅射金属层。 接触焊盘形成在第二溅射金属层上。 第一电介质层设置在衬底主体和钝化层上。 在第一电介质层上形成第一电路层。 第一导电通孔形成在第一电介质层中并电连接到接触焊盘。 第一电路层电连接到第一导电通孔。