公开(公告)号：US08138583B2

公开(公告)日：2012-03-20

申请号：US11675658

申请日：2007-02-16

申请人： Saptharishi Sriram ,  Thomas J. Smith, Jr. ,  Helmut Hagleitner

发明人： Saptharishi Sriram ,  Thomas J. Smith, Jr. ,  Helmut Hagleitner

IPC分类号： H01L29/15

CPC分类号： H01L29/1608 ,  H01L23/291 ,  H01L23/31 ,  H01L29/0657 ,  H01L29/6606 ,  H01L29/6609 ,  H01L29/861 ,  H01L29/868 ,  H01L2924/0002 ,  H01L2924/00

摘要： A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.

摘要翻译： 在正向偏置状态下具有降低的导通电阻的二极管结构包括优选为碳化硅的半导体层。 器件的阳极和阴极位于底部半导体层的同一侧，提供横跨二极管体的横向导通。 阳极定位在半导体台面上，并且台面的侧面被从阳极延伸到底层的非导电间隔物覆盖。 欧姆接触，优选金属硅化物，覆盖在间隔物材料和阴极之间的底层的表面。 导电路径从阳极延伸穿过台面的主体并穿过底部半导体层，包括欧姆接触。 形成二极管的方法包括在二极管的适当区域上反应硅和金属层以形成金属硅化物的欧姆接触。

公开(公告)号：US07525122B2

公开(公告)日：2009-04-28

申请号：US11169378

申请日：2005-06-29

申请人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Patrick Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Thomas Sheppard ,  Richard Peter Smith ,  Saptharishi Sriram ,  Allan Ward, III

发明人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Patrick Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Thomas Sheppard ,  Richard Peter Smith ,  Saptharishi Sriram ,  Allan Ward, III

IPC分类号： H01L29/15 ,  H01L31/0256

CPC分类号： H01L21/045 ,  H01L21/3145 ,  H01L21/318 ,  H01L21/3185 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/24

摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

摘要翻译： 公开了钝化的半导体结构和相关方法。 该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

公开(公告)号：US20070120168A1

公开(公告)日：2007-05-31

申请号：US11289158

申请日：2005-11-29

申请人： Saptharishi Sriram

发明人： Saptharishi Sriram

IPC分类号： H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L29/1029 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/812

摘要： A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The unit cell includes a MESFET having a source, a drain and a gate. The gate is between the source and the drain and on a channel layer of the MESFET. The channel layer has a first thickness on a source side of the channel layer and a second thickness, thicker than the first thickness, on a drain side of the channel layer. Related methods of fabricating MESFETs are also provided herein.

摘要翻译： 提供了一种金属半导体场效应晶体管（MESFET）的晶胞。 该单元包括具有源极，漏极和栅极的MESFET。 栅极位于源极和漏极之间以及MESFET的沟道层上。 沟道层在沟道层的漏极侧具有在沟道层的源极侧的第一厚度和比第一厚度更厚的第二厚度。 本文还提供了制造MESFET的相关方法。

公开(公告)号：US20070001174A1

公开(公告)日：2007-01-04

申请号：US11169378

申请日：2005-06-29

申请人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Sheppard ,  Richard Smith ,  Saptharishi Sriram ,  Allan Ward

发明人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Sheppard ,  Richard Smith ,  Saptharishi Sriram ,  Allan Ward

IPC分类号： H01L29/15 ,  H01L31/0256

CPC分类号： H01L21/045 ,  H01L21/3145 ,  H01L21/318 ,  H01L21/3185 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/24

摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

摘要翻译： 公开了钝化的半导体结构和相关方法。 该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

公开(公告)号：US20060125001A1

公开(公告)日：2006-06-15

申请号：US11012553

申请日：2004-12-15

申请人： Saptharishi Sriram

发明人： Saptharishi Sriram

IPC分类号： H01L29/76

CPC分类号： H01L29/0619 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/8128

摘要： The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a source, a drain and a gate. The gate is disposed between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the source and has an end that extends towards the drain. The p-type conductivity region is spaced apart from the n-type conductivity channel region and is electrically coupled to the source. An n-type conductivity region is provided on the p-type conductivity region beneath the source region and extending toward the drain region without extending beyond the end of the p-type conductivity region. Related methods of fabricating MESFETS are also provided.

摘要翻译： 本发明提供了一种金属半导体场效应晶体管（MESFET）的单元。 MESFET的单元包括源极，漏极和栅极。 栅极设置在源极和漏极之间以及n型导电沟道层上。 在源极下方提供p型导电区域，并且具有朝向漏极延伸的端部。 p型导电区域与n型导电沟道区域间隔开并且电耦合到源极。 在源极区域下方的p型导电性区域上设置n型导电性区域，并且朝向漏极区域延伸，而不延伸超过p型导电性区域的端部。 还提供了制造MESFETS的相关方法。

公开(公告)号：US20060091498A1

公开(公告)日：2006-05-04

申请号：US10977227

申请日：2004-10-29

申请人： Saptharishi Sriram ,  Jason Henning

发明人： Saptharishi Sriram ,  Jason Henning

IPC分类号： H01L27/102 ,  H01L31/11 ,  H01L27/082 ,  H01L29/70

CPC分类号： H01L29/66863 ,  H01L21/8213 ,  H01L27/0605 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/812

摘要： High power transistors are provided. The transistors include a source region, a drain region and a gate contact. The gate contact is positioned between the source region and the drain region. First and second ohmic contacts are provided on the source and drain regions, respectively. The first and second ohmic contacts respectively define a source contact and a drain contact. The source contact and the drain contact have respective first and second widths. The first and second widths are different. Related methods of fabricating transistors are also provided.

摘要翻译： 提供大功率晶体管。 晶体管包括源极区，漏极区和栅极接触。 栅极接触位于源极区域和漏极区域之间。 第一和第二欧姆触点分别设置在源极和漏极区域上。 第一和第二欧姆触点分别限定了源极触点和漏极触点。 源触点和漏极触点具有相应的第一和第二宽度。 第一和第二宽度是不同的。 还提供了制造晶体管的相关方法。

公开(公告)号：US06902964B2

公开(公告)日：2005-06-07

申请号：US10909112

申请日：2004-07-30

申请人： Saptharishi Sriram

发明人： Saptharishi Sriram

IPC分类号： H01L21/28 ,  H01L21/338 ,  H01L27/095 ,  H01L29/24 ,  H01L29/36 ,  H01L29/812 ,  H01L21/44

CPC分类号： H01L29/8128 ,  H01L29/242 ,  H01L29/365

摘要： The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a delta doped silicon carbide MESFET having a source, a drain and a gate. The gate is situated between the source and the drain and extends into a doped channel layer of a first conductivity type. Regions of silicon carbide adjacent to the source and the drain extend between the source and the gate and the drain and the gate, respectively. The regions of silicon carbide have carrier concentrations that are greater than a carrier concentration of the doped channel layer and are spaced apart from the gate.

摘要翻译： 本发明提供了一种金属半导体场效应晶体管（MESFET）的单元。 MESFET的单元包括具有源极，漏极和栅极的δ掺杂碳化硅MESFET。 栅极位于源极和漏极之间并延伸到第一导电类型的掺杂沟道层中。 与源极和漏极相邻的碳化硅区域分别在源极和栅极以及漏极和栅极之间延伸。 碳化硅的区域具有大于掺杂沟道层的载流子浓度并且与栅极间隔开的载流子浓度。

公开(公告)号：US5925895A

公开(公告)日：1999-07-20

申请号：US812227

申请日：1997-03-06

申请人： Saptharishi Sriram ,  Rowland C. Clarke

发明人： Saptharishi Sriram ,  Rowland C. Clarke

IPC分类号： H01L21/04 ,  H01L29/24 ,  H01L29/812 ,  H01L31/0312 ,  H01L29/12

CPC分类号： H01L29/1608 ,  H01L21/045 ,  H01L29/66068 ,  H01L29/8128

摘要： A silicon carbide metal semiconductor field effect transitor fabricated on silicon carbide substrate with a layer which suppresses surface effects, and method for producing same. The surface-effect-suppressive layer may be formed on exposed portions of the transistor channel and at least a portion of each contact degenerate region. The surface-effect-suppressive layer may be made of undoped silicon carbide or of an insulator, such as silicon dioxide or silicon nitride. If the surface-effect-suppressive layer is made of silicon dioxide, it is preferred that the layer be fabricated of a combination of thermally-grown and chemical vapor deposition deposited silicon dioxide.

摘要翻译： 在具有抑制表面效应的层的碳化硅衬底上制造的碳化硅金属半导体场效应晶体管及其制造方法。 表面效应抑制层可以形成在晶体管沟道的暴露部分和每个接触退化区域的至少一部分上。 表面效应抑制层可以由未掺杂的碳化硅或诸如二氧化硅或氮化硅的绝缘体制成。 如果表面效应抑制层由二氧化硅制成，则优选由热生长和化学气相沉积沉积的二氧化硅的组合制成该层。

公开(公告)号：US08421122B2

公开(公告)日：2013-04-16

申请号：US13110573

申请日：2011-05-18

申请人： Thomas J. Smith, Jr. ,  Matthew Wills ,  Saptharishi Sriram

发明人： Thomas J. Smith, Jr. ,  Matthew Wills ,  Saptharishi Sriram

IPC分类号： H01L29/66 ,  H01L31/0256

CPC分类号： H03K17/693 ,  H01L23/645 ,  H01L27/0207 ,  H01L27/0605 ,  H01L27/088 ,  H01L2223/6683 ,  H01L2924/0002 ,  H01L2924/00

摘要： A monolithic high power radio frequency switch includes a substrate, and first and second gallium nitride high electron mobility transistors on the substrate. Each of the first and second gallium nitride high electron mobility transistors includes a respective source, drain and gate terminal. The source terminal of the first gallium nitride high electron mobility transistor is coupled to the drain terminal of the second gallium nitride high electron mobility transistor, and the source terminal of the second gallium nitride high electron mobility transistor is coupled to ground. An RF input pad is coupled to the drain terminal of the first second gallium nitride high electron mobility transistor, an RF output pad is coupled to the source terminal of the first gallium nitride high electron mobility transistor and the drain terminal of the second gallium nitride high electron mobility transistor, and a control pad is coupled to the gate of the first gallium nitride high electron mobility transistor.

摘要翻译： 单片高功率射频开关包括衬底，以及衬底上的第一和第二氮化镓高电子迁移率晶体管。 第一和第二氮化镓高电子迁移率晶体管中的每一个包括相应的源极，漏极和栅极端子。 第一氮化镓高电子迁移率晶体管的源极端子耦合到第二氮化镓高电子迁移率晶体管的漏极端子，并且第二氮化镓高电子迁移率晶体管的源极端子接地。 RF输入焊盘耦合到第一第二氮化镓高电子迁移率晶体管的漏极端子，RF输出焊盘耦合到第一氮化镓高电子迁移率晶体管的源极端子和第二氮化镓高电子迁移率晶体管的漏极端子 电子迁移率晶体管和控制焊盘耦合到第一氮化镓高电子迁移率晶体管的栅极。

公开(公告)号：US08304783B2

公开(公告)日：2012-11-06

申请号：US12477376

申请日：2009-06-03

申请人： Saptharishi Sriram ,  Qingchun Zhang

发明人： Saptharishi Sriram ,  Qingchun Zhang

IPC分类号： H01L29/47

CPC分类号： H01L29/861 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/868 ,  H01L29/872

摘要： Hybrid semiconductor devices including a PIN diode portion and a Schottky diode portion are provided. The PIN diode portion is provided on a semiconductor substrate and has an anode contact on a first surface of the semiconductor substrate. The Schottky diode portion is also provided on the semiconductor substrate and includes a polysilicon layer on the semiconductor substrate and a ohmic contact on the polysilicon layer. Related Schottky diodes are also provided herein.

摘要翻译： 提供了包括PIN二极管部分和肖特基二极管部分的混合半导体器件。 PIN二极管部分设置在半导体衬底上，并且在半导体衬底的第一表面上具有阳极接触。 肖特基二极管部分也设置在半导体衬底上并且包括在半导体衬底上的多晶硅层和在多晶硅层上的欧姆接触。 本文还提供了相关的肖特基二极管。