Abstract:
A nonvolatile memory device includes a plurality of first control gate electrodes, second control gate electrodes, first storage node films, and second storage node films. The first control gate electrodes are recessed into a semiconductor substrate. Each second control gate electrode is disposed between two adjacent first control gate electrodes. The second control gate electrodes are disposed on the semiconductor substrate over the first control gate electrodes. The first storage node films are disposed between the semiconductor substrate and the first control gate electrodes. The second storage node films are disposed between the semiconductor substrate and the second control gate electrodes. A method of fabricating the nonvolatile memory device includes forming the first storage node films, forming the first control gate electrodes, forming the second storage node films, and forming the second control gate electrodes.
Abstract:
A nonvolatile memory device that may operate in a multi-bit mode and a method of operating and manufacturing the nonvolatile memory device are provided. The nonvolatile memory device may include a first source region and a first drain region that are respectively in first fin portions on both sides of a control gate electrode and respectively separated from the control gate electrode, a second source region and a second drain region that are respectively formed in second fin portions on both sides of the control gate electrode and respectively separated from the control gate electrode, first and second storage node layers that are formed with the control gate electrode therebetween and on the side of the first fin opposite to a buried insulating layer between first and second fins, and third and fourth storage node layers that are formed with the control gate electrode therebetween and on the side of the second fin opposite to the buried insulating layer. The nonvolatile memory device may further include a semiconductor substrate including the first and second fins, a control gate electrode on the sides of the first and second fins opposite to the buried insulating layer and extending onto the buried insulating layer and a gate insulating layer between the first and second fins and the control gate electrode.
Abstract:
Off-axis projection optics that includes first and second mirrors positioned off-axis and sharing a confocal point that are arranged to reduce linear astigmatism. If a distance between an object plane and the first mirror is l1, an incident angle of light coming from the object plane to the first mirror is i1, a distance between the first mirror and the confocal point is l1′, a distance between the confocal point and the second mirror is l2, an incident angle of light coming from the first mirror to the second mirror is i2, and a distance between the second mirror and an image plane is l2′, the off-axis projection optics may satisfy the following equation: l 1 ′ + l 1 l 1 tan i 1 = l 2 ′ + l 2 l 2 tan i 2 .
Abstract:
A NAND-type nonvolatile memory device includes a first string and a second string. The ends of each of the first and second strings are connected to a common bit line and a common source line, respectively. Each of the first string and the second string have a string selection transistors, a plurality of unit devices and a source selection transistor. Word lines are respectively connected to control gates of the unit devices in the same rows. A first string selection line and a second string selection line are respectively connected to the gates of the string selection transistors of the first string and the second string. A first source selection line and a second source selection line are respectively connected to the gates of the first string and the second string.
Abstract:
Example embodiments of the present invention relate to a semiconductor device and methods of fabricating the same. Other example embodiments of the present invention relate to a fin-field effect transistor (Fin-FET) having a fin-type channel region and methods of fabricating the same. A Fin-FET having a gate all around (GAA) structure that may use an entire area around a fin as a channel region is provided. The Fin-FET having the GAA structure includes a semiconductor substrate having a body, a pair of support pillars and a fin. The pair of support pillars may protrude from the body. A fin may be spaced apart from the body and may have ends connected to and supported by the pair of support pillars. A gate electrode may surround at least a portion of the fin of the semiconductor substrate. The gate electrode may be insulated from the semiconductor substrate. A gate insulation layer may be interposed between the gate electrode and the fin of the semiconductor substrate.
Abstract:
Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.
Abstract:
An off-axis projection optical system including first and second mirrors that are off-axially arranged is provided. The tangential and sagittal radii of curvature of the first mirror may be R1t and R1s, respectively. The tangential and sagittal radii of curvature of the second mirror may be R2t and R2s, respectively. The incident angle of the beam from an object point to the first mirror 10 may be i1, and an incident angle of the beam reflected from the first mirror 10 to the second mirror 30 is i2. The values of R1t, R1s, R2t, R2s, i1 and i2 may satisfy the following Equation. R1t cos i1=R2t cos i2 R1s=R1t cos2i1 R2s=R2t cos2i2
Abstract:
A mask for lithography and a method of manufacturing the same. The mask may include a substrate, a reflection layer formed of a material capable of reflecting electromagnetic rays on the substrate and an absorption pattern formed in a desired pattern such that absorbing regions with respect to electromagnetic rays and windows through which electromagnetic rays pass are formed, wherein the absorption pattern includes at least one side surface that is adjacent to the window and is inclined with respect to the reflection layer. The method may include forming a reflection layer which is formed of a material capable of reflecting electromagnetic rays on a substrate, forming an absorption layer which is formed of a material capable of absorbing electromagnetic rays on the refection layer, and patterning the absorption layer to form an absorption pattern with at least one side surface adjacent to a window that has an inclined side surface with respect to the reflection layer.
Abstract:
A ferroelectric capacitor comprises a first electrode comprising an alloy containing a first element and a second element of the periodic table of the elements, the first element being selected from the group consisting of Ir and Ru. A ferroelectric layer is disposed on the first electrode, wherein the ferroelectric layer comprises a ferroelectric material containing the second element. A second electrode is disposed on the ferroelectric layer. The ferroelectric capacitor can be provided as part of a memory cell of a ferroelectric memory.
Abstract:
Disclosed is a method for preparing heteroepitaxial thin films which are free of island structures which have a bad influence on the photoelectric properties and interfacial reactivity of the thin films. These heteroepitaxial thin films are deposited on grooved or curved surfaces of substrates. The use of grooved substrates relieves the coherent elastic strain from the thin films, thereby inhibiting the surface roughening and the island structure formation in the heteroepitaxial thin films. The method can be applied to all of the thin films that show island structures, including GaAs/Si and SiGe/Si typically used in semiconductor devices and various electronic parts, enabling the thin films to be flatly deposited at a significant thickness on various substrates without additionally processing.