公开(公告)号：US20240218560A1

公开(公告)日：2024-07-04

申请号：US18397635

申请日：2023-12-27

Applicant: ASM IP Holding B.V.

Inventor： Sandeep Ghosh ,  Robinson James ,  Caleb Miskin

IPC: C30B25/16 ,  C23C16/24 ,  C23C16/52 ,  C30B25/10 ,  C30B29/06 ,  G01B21/08 ,  H01L21/02

CPC classification number: C30B25/16 ,  C23C16/24 ,  C23C16/52 ,  C30B25/10 ,  C30B29/06 ,  G01B21/08 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/0262

Abstract: A semiconductor processing system includes a precursor delivery arrangement, a chamber arrangement, and a controller. The chamber arrangement is connected to the precursor delivery arrangement. The controller is operatively connected to the precursor delivery arrangement and the chamber arrangement, includes a processor disposed in communication with a memory, and is responsive to instructions recorded on the memory to acquire a baseline substrate thickness profile for a selected process recipe, determine a first temperature profile setting for depositing a first material layer at low pressure for the selected process recipe, determine a high-pressure thermal offset for the first temperature profile setting, apply the high-pressure thermal offset to the first temperature profile setting to determine a second temperature profile setting, seat a first substrate on the first substrate support within the chamber arrangement and flow a second material layer precursor via the precursor delivery arrangement over the first substrate at high pressure according to the selected process recipe using the second temperature profile setting.

公开(公告)号：US20240204057A1

公开(公告)日：2024-06-20

申请号：US18540230

申请日：2023-12-14

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Yanfu Lu ,  Caleb Miskin

IPC: H01L29/161 ,  H01L21/02 ,  H01L21/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/161 ,  H01L21/02532 ,  H01L22/12 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: Methods for forming semiconductor stacked structures are disclosed. The methods may include, seating a substrate within a chamber body, and regulating a temperature profile across an upper surface of the substrate during each individual step of a sequential deposition process. Semiconductor stacked structures including two or more bilayers of SiGe/Si with intervening interface layers are also disclosed.

公开(公告)号：US20240175138A1

公开(公告)日：2024-05-30

申请号：US18518393

申请日：2023-11-22

Applicant: ASM IP HOlding B.V.

Inventor： Fan Gao ,  Peipei Gao ,  Xing Lin ,  Arun Murali ,  Gregory Deye ,  Frederick Aryeetey ,  Amir Kajbafvala ,  Caleb Miskin ,  Alexandros Demos

IPC: C23C16/52 ,  C23C16/44 ,  C23C16/46 ,  H01L21/67

CPC classification number: C23C16/52 ,  C23C16/4412 ,  C23C16/46 ,  H01L21/67017 ,  H01L21/67126 ,  H01L21/67253

Abstract: Systems and methods controlling the pressure differential between two sealed chambers connected by a gate valve in preparation for a gate valve opening event. Such systems and methods may adjust gas pressure in at least one of the chambers, if needed, until the pressure differential between the two chambers is at a predetermined pressure differential level. In some more specific examples, one chamber may constitute a substrate handling chamber, the other chamber may constitute a reaction chamber (e.g., for depositing one or more layers on a surface of a substrate), and the gate valve opening event may allow a substrate to be transferred from one chamber to the other (e.g., from the reaction chamber into the substrate handling chamber).

公开(公告)号：US20220298643A1

公开(公告)日：2022-09-22

申请号：US17697079

申请日：2022-03-17

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Yanfu Lu ,  Robinson James ,  Caleb Miskin

IPC: C23C16/48 ,  H01L29/66 ,  C23C16/52 ,  G01K7/10 ,  G01J5/00 ,  C23C16/30 ,  C23C16/24

Abstract: A method of forming structure includes providing a substrate in a reaction chamber, forming a first layer overlaying the substrate, and forming a second layer onto the first layer. Temperature of the first layer is controlled during the forming of the first layer using infrared electromagnetic radiation emitted by the first layer. Temperature of the second layer is controlled during the forming of the second layer using infrared electromagnetic radiation emitted by the second layer. Semiconductor device structures and semiconductor processing systems are also described.

公开(公告)号：US20250084534A1

公开(公告)日：2025-03-13

申请号：US18961650

申请日：2024-11-27

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Caleb Miskin

IPC: C23C16/455 ,  C23C16/24 ,  C23C16/42 ,  C23C16/44 ,  C23C16/52 ,  C23C16/56 ,  H01L21/02

Abstract: A method of depositing one or more epitaxial material layers, a device structure formed using the method and a system for performing the method are disclosed. Exemplary methods include coating a surface of a reaction chamber with a precoat material, processing a number of substrates, and then cleaning the reaction chamber.

公开(公告)号：US12057314B2

公开(公告)日：2024-08-06

申请号：US17317965

申请日：2021-05-12

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Peter Westrom ,  Joe Margetis ,  Xin Sun ,  Caleb Miskin ,  Yen Lin Leow ,  Yanfu Lu

IPC: C30B25/16 ,  C23C16/08 ,  C23C16/455 ,  C23C16/52 ,  C30B25/18 ,  C30B29/52 ,  H01L21/02

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/45512 ,  C23C16/52 ,  C30B25/165 ,  C30B25/186 ,  C30B29/52 ,  H01L21/02532

Abstract: A method of forming a silicon germanium layer on a surface of a substrate and a system for forming a silicon germanium layer are disclosed. Examples of the disclosure provide a method that includes providing a plurality of growth precursors to control and/or promote parasitic gas-phase and surface reactions, such that greater control of the film (e.g., thickness and/or composition) uniformity can be realized.

公开(公告)号：US20240068103A1

公开(公告)日：2024-02-29

申请号：US18458101

申请日：2023-08-29

Applicant: ASM IP Holding, B.V.

Inventor： Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos ,  Amir Kajbafvala ,  Arun Murali

IPC: C23C16/52 ,  C23C16/30 ,  C23C16/458 ,  C23C16/46

CPC classification number: C23C16/52 ,  C23C16/30 ,  C23C16/4584 ,  C23C16/46 ,  G01K7/04

Abstract: A chamber arrangement has a chamber body with upper and lower walls. A substrate support is arranged within an interior of the chamber body and supported for rotation about a rotation axis. An upper heater element array is supported above the upper wall and a lower heater element array supported below the lower wall. A pyrometer is supported above the upper heater element array, is optically coupled to the interior of the chamber body, and is operably connected to the upper heater element array. A thermocouple is arranged within the interior of the chamber body, is in intimate mechanical contact with the substrate support, and is operably connected to the lower heater element array. Semiconductor processing systems and material layer deposition methods are also described.

公开(公告)号：US20230324227A1

公开(公告)日：2023-10-12

申请号：US18190696

申请日：2023-03-27

Applicant: ASM IP Holding, B.V.

Inventor： Ernesto Suarez ,  Amir Kajbafvala ,  Caleb Miskin ,  Bubesh Babu Jotheeswaran ,  Alexandros Demos

IPC: C23C16/52 ,  H01L21/67 ,  C23C16/44 ,  G01J5/00

CPC classification number: G01J5/0007 ,  C23C16/4407 ,  C23C16/52 ,  H01L21/67115 ,  H01L21/67248

Abstract: A method of depositing an epitaxial material layer using pyrometer-based control. The method includes cleaning a reaction chamber of a reactor system, and, after the cleaning, providing a substrate within the reaction chamber. The method includes stabilizing a temperature of the substrate relative to a target deposition temperature. During stabilization, the heater assembly is operated with control signals to operate heaters in the heater assembly that are generated based on a direct measurement of the temperature of the substrate, such as with one to three pyrometers. The method includes, after the stabilizing of the temperature of the substrate, depositing an epitaxial material layer on a surface of the substrate. Then, for an additional number of substrates, the method involves repeating the steps of providing a substrate within the reaction chamber, stabilizing the temperature of the substrate, and depositing an epitaxial material layer on the substrate followed by another chamber cleaning.

公开(公告)号：US20230223255A1

公开(公告)日：2023-07-13

申请号：US18153272

申请日：2023-01-11

Applicant: ASM IP Holding, B.V.

Inventor： Steven Van Aerde ,  Wilco Verweij ,  Bert Jongbloed ,  Dieter Pierreux ,  Kelly Houben ,  Rami Khazaka ,  Frederick Aryeetey ,  Peter Westrom ,  Omar Elleuch ,  Caleb Miskin

IPC: H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68

CPC classification number: H01L21/0257 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L21/0262 ,  H01L21/02532

Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing the plurality of substrates to a process chamber. A plurality of deposition cycles is executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial stack comprises a plurality of epitaxial pairs, wherein the epitaxial pairs each comprises a first epitaxial layer and a second epitaxial layer, the second epitaxial layer being different from the first epitaxial layer. Each deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer. The second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer. The first deposition pulse or the second deposition pulse further comprises a provision of a dopant precursor gas to the process chamber.

公开(公告)号：US20230203706A1

公开(公告)日：2023-06-29

申请号：US18086734

申请日：2022-12-22

Applicant: ASM IP Holding B.V.

Inventor： Alexandros Demos ,  Hichem M'Saad ,  Xing Lin ,  Caleb Miskin ,  Shivaji Peddeti ,  Amir Kajbafvala

IPC: C30B25/14 ,  C30B25/12 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/08

CPC classification number: C30B25/14 ,  C30B25/12 ,  C30B25/165 ,  C30B25/186 ,  C30B29/06 ,  C30B29/08

Abstract: A reactor system may comprise a first reaction chamber and a second reaction chamber. The first and second reaction chambers may each comprise a reaction space enclosed therein, a susceptor disposed within the reaction space, and a fluid distribution system in fluid communication with the reaction space. The susceptor in each reaction chamber may be configured to support a substrate. The reactor system may further comprise a first reactant source, wherein the first reaction chamber and the second reaction chamber are fluidly coupled to the first reactant source at least partially by a first reactant shared line. The reactor system may be configured to deliver a first reactant from the first reactant source to the first reaction chamber and a second reaction chamber through the first reactant shared line.