公开(公告)号：US20090197391A1

公开(公告)日：2009-08-06

申请号：US12359367

申请日：2009-01-26

申请人： Hideto OHNUMA ,  Shunpei YAMAZAKI

发明人： Hideto OHNUMA ,  Shunpei YAMAZAKI

IPC分类号： H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： A method for manufacturing an SOI substrate is provided in which adhesiveness between a single crystal semiconductor substrate and a semiconductor substrate is improved; bonding defects are reduced; and sufficient bonding strength is provided in a bonding step and also in a process of manufacturing a semiconductor device. An insulating film including halogen is formed on a single crystal semiconductor substrate side in which an embrittlement layer is formed. The insulating film including halogen undergoes a plasma treatment. The insulating film including halogen and a face of a semiconductor substrate are bonded so as to face each other. A thermal treatment is performed to split the single crystal semiconductor substrate along the embrittlement layer, thereby separating the single crystal semiconductor substrate into a single crystal semiconductor substrate and the semiconductor substrate to which a single crystal semiconductor layer is bonded. The single crystal semiconductor layer bonded to the semiconductor substrate undergoes a planarization treatment.

摘要翻译： 提供一种制造SOI衬底的方法，其中提高了单晶半导体衬底和半导体衬底之间的粘合性; 键合缺陷减少; 并且在接合步骤以及制造半导体器件的工艺中提供了足够的接合强度。 在其中形成有脆化层的单晶半导体衬底侧上形成包括卤素的绝缘膜。 包括卤素的绝缘膜经受等离子体处理。 包含卤素和半导体衬底的表面的绝缘膜以彼此面对的方式接合。 进行热处理以沿着脆化层分裂单晶半导体衬底，从而将单晶半导体衬底分离成单晶半导体衬底和与单晶半导体层结合的半导体衬底。 接合到半导体衬底的单晶半导体层进行平坦化处理。

公开(公告)号：US20090137101A1

公开(公告)日：2009-05-28

申请号：US12247470

申请日：2008-10-08

申请人： Shunpei YAMAZAKI ,  Hideto OHNUMA ,  Yoichi IIKUBO ,  Yoshiaki YAMAMOTO ,  Kenichiro MAKINO

发明人： Shunpei YAMAZAKI ,  Hideto OHNUMA ,  Yoichi IIKUBO ,  Yoshiaki YAMAMOTO ,  Kenichiro MAKINO

IPC分类号： H01L21/71

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： To provide a method for manufacturing an SOI substrate provided with a semiconductor layer which can be used practically even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like is used. The semiconductor layer is transferred to a supporting substrate by the steps of irradiating a semiconductor wafer with ions from one surface to form a damaged layer; forming an insulating layer over one surface of the semiconductor wafer; attaching one surface of the supporting substrate to the insulating layer formed over the semiconductor wafer and performing heat treatment to bond the supporting substrate to the semiconductor wafer; and performing separation at the damaged layer into the semiconductor wafer and the supporting substrate. The damaged layer remaining partially over the semiconductor layer is removed by wet etching and a surface of the semiconductor layer is irradiated with a laser beam.

摘要翻译： 为了提供一种制造具有半导体层的SOI衬底的方法，即使使用诸如玻璃衬底等的耐热温度低的衬底也可以实际使用。 通过以下步骤将半导体层转移到支撑衬底：从一个表面照射半导体晶片以形成损伤层; 在所述半导体晶片的一个表面上形成绝缘层; 将所述支撑基板的一个表面附接到形成在所述半导体晶片上的绝缘层，并进行热处理以将所述支撑基板接合到所述半导体晶片; 并且在所述损伤层处进行到所述半导体晶片和所述支撑基板的分离。 通过湿蚀刻除去半导体层上部分残留的损伤层，并用激光束照射半导体层的表面。

公开(公告)号：US20090081850A1

公开(公告)日：2009-03-26

申请号：US12212990

申请日：2008-09-18

申请人： Hideto OHNUMA ,  Shunpei YAMAZAKI

发明人： Hideto OHNUMA ,  Shunpei YAMAZAKI

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： The method includes steps of adding first ions to a predetermined depth from a main surface of a semiconductor substrate by irradiation of the semiconductor substrate with a planar, linear, or rectangular ion beam, so that a separation layer is formed; adding second ions to part of the separation layer formed in the semiconductor substrate; disposing the main surface of the semiconductor substrate and a main surface of a base substrate to face each other in order to bond a surface of an insulating film and the base substrate; and cleaving the semiconductor substrate using the separation layer as a cleavage plane, so that a single crystal semiconductor layer is formed over the base substrate. The mass number of the second ions is the same as or larger than that of the first ions.

摘要翻译： 该方法包括以下步骤：通过用平面，线性或矩形离子束照射半导体衬底，从半导体衬底的主表面加入第一离子至预定深度，从而形成分离层; 向形成在半导体衬底中的分离层的一部分添加第二离子; 将半导体基板的主表面和基底基板的主表面设置为彼此面对以便将绝缘膜和基底的表面粘合; 并使用分离层将半导体衬底切割为解理面，从而在基底衬底上形成单晶半导体层。 第二离子的质量数与第一离子的质量数相同或者更大。

公开(公告)号：US20110068339A1

公开(公告)日：2011-03-24

申请号：US12958739

申请日：2010-12-02

申请人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

发明人： Toshimitsu KONUMA ,  Akira SUGAWARA ,  Yukiko UEHARA ,  Hongyong ZHANG ,  Atsunori SUZUKI ,  Hideto OHNUMA ,  Naoaki YAMAGUCHI ,  Hideomi SUZAWA ,  Hideki UOCHI ,  Yasuhiko TAKEMURA

IPC分类号： H01L29/772 ,  H01L27/12

CPC分类号： H01L29/665 ,  H01L21/02145 ,  H01L21/02244 ,  H01L21/02258 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/31683 ,  H01L21/31687 ,  H01L21/321 ,  H01L27/124 ,  H01L27/127 ,  H01L29/458 ,  H01L29/66598 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627

摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

摘要翻译： 形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。 在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。 形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜去除一部分栅极绝缘体作为掩模，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。 此后，进行一个导电性元素的离子掺杂。 高电阻率区域限定在栅极绝缘膜下。

公开(公告)号：US20100244051A1

公开(公告)日：2010-09-30

申请号：US12731699

申请日：2010-03-25

申请人： Hideto OHNUMA

发明人： Hideto OHNUMA

IPC分类号： H01L29/24 ,  H01L21/18

CPC分类号： H01L29/66068 ,  H01L21/76254 ,  H01L21/8213 ,  H01L21/84 ,  H01L27/12 ,  H01L29/1608 ,  H01L29/66651 ,  H01L29/66772 ,  H01L29/78684

摘要： An object is to realize an integrated circuit included in a semiconductor device which has multiple functions, or to increase the size of an integrated circuit even when the integrated circuit is formed using a silicon carbide substrate. The integrated circuit includes a first transistor including an island-shaped silicon carbide layer provided over a substrate with a first insulating layer interposed therebetween, a first gate insulating layer provided over the silicon carbide layer, and a first conductive layer provided over the first gate insulating layer and overlapped with the silicon carbide layer; and a second transistor including an island-shaped single crystal silicon layer provided over the substrate with a second insulating layer interposed therebetween, a second gate insulating layer provided over the single crystal silicon layer, and a second conductive layer provided over the second gate insulating layer and overlapped with the single crystal silicon layer.

摘要翻译： 本发明的目的是实现具有多种功能的半导体器件中的集成电路，或者即使当使用碳化硅衬底形成集成电路时也可以增加集成电路的尺寸。 集成电路包括：第一晶体管，包括设置在基板上的岛状碳化硅层，其间插入有第一绝缘层，设置在碳化硅层上的第一栅极绝缘层，以及设置在第一栅极绝缘层上的第一导电层 并与碳化硅层重叠; 以及第二晶体管，其包括设置在所述基板上的岛状单晶硅层，其间插入有第二绝缘层，设置在所述单晶硅层上的第二栅极绝缘层，以及设置在所述第二栅极绝缘层上的第二导电层 并与单晶硅层重叠。

公开(公告)号：US20100096720A1

公开(公告)日：2010-04-22

申请号：US12580532

申请日：2009-10-16

申请人： Hideto OHNUMA ,  Eiji HIGA

发明人： Hideto OHNUMA ,  Eiji HIGA

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L21/76254

摘要： To provide an SOI substrate having a high mechanical strength, and a method for manufacturing the SOI substrate, a single crystal semiconductor substrate is irradiated with accelerated ions so that an embrittled region is formed in a region at a predetermined depth from a surface of the single crystal semiconductor substrate; the single crystal semiconductor substrate is bonded to a base substrate with an insulating layer interposed therebetween; the single crystal semiconductor substrate is heated to be separated along the embrittled region, so that a semiconductor layer is provided over the base substrate with the insulating layer interposed therebetween; and a surface of the semiconductor layer is irradiated with a laser beam so that at least a superficial part of the semiconductor layer is melted, whereby at least one of nitrogen, oxygen, and carbon is solid-dissolved in the semiconductor layer.

摘要翻译： 为了提供具有高机械强度的SOI衬底以及SOI衬底的制造方法，用加速离子照射单晶半导体衬底，使得在距离单个表面的表面预定深度的区域中形成脆化区域 晶体半导体衬底; 将单晶半导体基板与绝缘层接合在基底基板上， 单晶半导体衬底被加热以沿着脆化区域分离，从而在绝缘层之间设置在基底衬底上的半导体层; 并且用激光束照射半导体层的表面，使得至少半导体层的表面部分熔化，由此氮，氧和碳中的至少一个固体溶解在半导体层中。

公开(公告)号：US20090263942A1

公开(公告)日：2009-10-22

申请号：US12420887

申请日：2009-04-09

申请人： Hideto OHNUMA ,  Noritsugu NOMURA

发明人： Hideto OHNUMA ,  Noritsugu NOMURA

IPC分类号： H01L21/336

CPC分类号： H01L21/76254 ,  H01L21/84 ,  H01L27/1233 ,  H01L29/78621

摘要： A single crystal semiconductor substrate including an embrittlement layer is attached to a base substrate with an insulating layer interposed therebetween, and the single crystal semiconductor layer is separated at the embrittlement layer by heat treatment; accordingly, a single crystal semiconductor layer is fixed over the base substrate. The single crystal semiconductor layer is irradiated with a laser beam so that the single crystal semiconductor layer is partially melted and then is re-single crystallized, whereby crystal defects are removed. In addition, an island-shaped single crystal semiconductor layer for forming an n-channel transistor is channel-doped using a photomask and then is etched back using the photomask so that the island-shaped single crystal semiconductor layer for forming an n-channel transistor is thinner than the island-shaped single crystal semiconductor layer for forming a p-channel transistor.

摘要翻译： 将具有脆化层的单晶半导体基板安装在基板上，其间插入有绝缘层，并且通过热处理在脆化层处分离单晶半导体层; 因此，单晶半导体层固定在基底基板上。 用激光束照射单晶半导体层，使得单晶半导体层部分熔融，然后重新单晶化，从而除去晶体缺陷。 此外，用于形成n沟道晶体管的岛状单晶半导体层使用光掩模进行沟道掺杂，然后使用光掩模进行回蚀，从而形成用于形成n沟道晶体管的岛状单晶半导体层 比用于形成p沟道晶体管的岛状单晶半导体层薄。

公开(公告)号：US20090223628A1

公开(公告)日：2009-09-10

申请号：US12366728

申请日：2009-02-06

申请人： Hideto OHNUMA ,  Tomoaki MORIWAKA

发明人： Hideto OHNUMA ,  Tomoaki MORIWAKA

IPC分类号： B32B37/00

CPC分类号： B32B37/025 ,  B32B38/0012 ,  B32B38/162 ,  B32B2309/02 ,  B32B2309/08 ,  B32B2309/105 ,  B32B2309/72 ,  B32B2310/028 ,  B32B2310/0409 ,  B32B2457/14 ,  B32B2457/20 ,  B32B2457/202 ,  H01L21/67046 ,  H01L21/67092 ,  H01L21/67766

摘要： A method for bonding a plurality of single crystal semiconductor substrates to a large supporting substrate such as a glass substrate while effectively aligning the substrates, and a method for reducing contaminants attached to a bonding surface during the bonding process. A plurality of single crystal semiconductor substrates are arranged on corresponding trays so that the front surfaces of the substrates face vertically downward, and a large supporting substrate is arranged so that the front surface thereof faces vertically upward. Next, the single crystal semiconductor substrates are spaced from the trays, and pressure is applied to part of each of the single crystal semiconductor substrates while the edges thereof are supported, whereby the front surfaces of the single crystal semiconductor substrates are bonded to the front surface of the large supporting substrate.

摘要翻译： 一种用于将多个单晶半导体衬底接合到诸如玻璃衬底的大支撑衬底同时有效地对准衬底的方法，以及用于在接合工艺期间减少附着到接合表面的污染物的方法。 多个单晶半导体基板被布置在相应的托盘上，使得基板的前表面垂直向下，并且大的支撑基板被布置成使得其前表面垂直向上。 接下来，单晶半导体基板与托盘间隔开，并且在其每个单晶半导体基板的一部分被支撑的同时施加到每个单晶半导体基板的一部分，由此单晶半导体基板的前表面被接合到前表面 的大支撑基板。

公开(公告)号：US20070001225A1

公开(公告)日：2007-01-04

申请号：US11425545

申请日：2006-06-21

申请人： Hideto OHNUMA ,  Shigeharu MONOE

发明人： Hideto OHNUMA ,  Shigeharu MONOE

IPC分类号： H01L21/84 ,  H01L27/12

CPC分类号： H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/78624

摘要： To provide a manufacturing method in which LDD regions with different widths are formed in a self-aligned manner, and the respective widths are precisely controlled in accordance with each circuit. By using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function formed of a diffraction grating pattern or a semi-transparent film, the width of a region with a small thickness of a gate electrode can be freely set, and the widths of two LDD regions capable of being formed in a self-aligned manner with the gate electrode as a mask can be different in accordance with each circuit. In one TFT, both of two LDD regions with different widths overlap a gate electrode.

摘要翻译： 为了提供以自对准方式形成具有不同宽度的LDD区域的制造方法，并且根据每个电路精确地控制各个宽度。 通过使用具有由衍射光栅图案或半透明膜形成的具有光强度降低功能的辅助图案的光掩模或掩模版，可以自由地设定栅电极厚度的区域的宽度，并且 能够以与栅电极为掩模的自对准方式形成的两个LDD区域的宽度可以根据每个电路而不同。 在一个TFT中，具有不同宽度的两个LDD区域都与栅电极重叠。

公开(公告)号：US20110315900A1

公开(公告)日：2011-12-29

申请号：US13223556

申请日：2011-09-01

申请人： Hideto OHNUMA

发明人： Hideto OHNUMA

IPC分类号： G21K5/10

CPC分类号： H01L27/1266 ,  H01L21/2007 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： An object is to provide a method for manufacturing an SOI substrate, by which defective bonding can be prevented. An embrittled layer is formed in a region of a semiconductor substrate at a predetermined depth; an insulating layer is formed over the semiconductor substrate; the outer edge of the semiconductor substrate is selectively etched on the insulating layer side to a region at a greater depth than the embrittled layer; and the semiconductor substrate and a substrate having an insulating surface are superposed on each other and bonded to each other with the insulating layer interposed therebetween. The semiconductor substrate is heated to be separated at the embrittled layer while a semiconductor layer is left remaining over the substrate having an insulating surface.

摘要翻译： 本发明的目的是提供一种用于制造SOI衬底的方法，由此可以防止有缺陷的接合。 在半导体衬底的预定深度的区域中形成脆化层; 在半导体衬底上形成绝缘层; 半导体衬底的外边缘在绝缘层侧被选择性蚀刻到比脆化层更深的区域; 并且半导体衬底和具有绝缘表面的衬底彼此叠置并且彼此接合，并且绝缘层插入其间。 半导体衬底被加热以在脆化层处分离，同时半导体层留在具有绝缘表面的衬底上。