公开(公告)号：US08906207B2

公开(公告)日：2014-12-09

申请号：US13081042

申请日：2011-04-06

Applicant: Hong Sheng Yang ,  Chi-I Lang ,  Tony Chiang

Inventor： Hong Sheng Yang ,  Chi-I Lang ,  Tony Chiang

IPC: C23C14/34 ,  C23C14/54 ,  H01J37/34

CPC classification number: C23C14/34 ,  C23C14/54 ,  C23C14/548 ,  H01J37/3447

Abstract: The present disclosure includes a method for control of a film composition with co-sputter physical vapor deposition. In one implementation, the method includes: positioning first and second PVD guns above a substrate, selecting first and second collimators having first and second sets of physical characteristics, positioning the first and second collimators between the first and second PVD guns and the substrate, sputtering at least one material from the first and second PVD guns through the first and second collimators upon application of a first power and second power, wherein the first PVD gun has a first deposition rate from the first collimator at the first power, and the second PVD gun has a second deposition rate from the second collimator at the second power.

Abstract translation: 本公开内容包括用于控制具有共溅射物理气相沉积的膜组合物的方法。 在一个实施方案中，该方法包括：将第一和第二PVD枪定位在衬底上方，选择具有第一和第二组物理特性的第一和第二准直器，将第一和第二准直器定位在第一和第二PVD枪和衬底之间，溅射 在施加第一功率和第二功率时，来自第一和第二PVD枪的至少一种材料通过第一和第二准直器，其中第一PVD枪具有来自第一准直器的第一沉积速率，而第二PVD 枪在第二功率下具有来自第二准直器的第二沉积速率。

公开(公告)号：US08836365B2

公开(公告)日：2014-09-16

申请号：US12957346

申请日：2010-11-30

Applicant: Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC: G01R31/02 ,  G01R31/28

CPC classification number: G01R31/2858

Abstract: An apparatus and method for testing electromigration in semiconductor devices includes providing an electromigration test structure, where the electromigration test structure includes a first metal line; a metal bridge operatively coupled to the first metal line; a second metal line operatively coupled to the metal bridge; a barrier layer surrounding the electromigration test structure; current contact pads; and voltage contact pads. The current contact pads are connected to a current source and the voltage contact pads are connected to a voltage source. The barrier layer is exposed to the elevated current density as current travels from the first metal line across the barrier layer through the metal bridge to the second metal line.

Abstract translation: 一种用于测试半导体器件中的电迁移的装置和方法，包括提供电迁移测试结构，其中电迁移测试结构包括第一金属线; 操作地连接到第一金属线的金属桥; 可操作地耦合到所述金属桥的第二金属线; 围绕电迁移测试结构的阻挡层; 当前接触垫; 和电压接触垫。 当前接触焊盘连接到电流源，并且电压接触焊盘连接到电压源。 当电流从第一金属线穿过阻挡层穿过金属桥到第二金属线时，阻挡层暴露于升高的电流密度。

公开(公告)号：US20130230962A1

公开(公告)日：2013-09-05

申请号：US13602637

申请日：2012-09-04

Applicant: Zhi-Wen Sun ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang

Inventor： Zhi-Wen Sun ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

Abstract: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pretreating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material.

Abstract translation: 在电阻式切换存储装置使用的基板上形成NiO膜的方法包括：制备镍离子溶液; 接收衬底，其中衬底包括底部电极，用作阴极的底部电极; 在衬底上形成Ni（OH）2膜，其中在阴极处形成Ni（OH）2; 并且还原Ni（OH）2膜以形成NiO膜，其中NiO膜形成电阻式开关存储元件的一部分。 在一些实施例中，方法还包括在NiO膜上形成顶部电极，并在形成Ni（OH）2膜之前，预处理衬底。 在一些实施例中，呈现了底部电极和顶部电极为导电材料的方法。

公开(公告)号：US08481403B1

公开(公告)日：2013-07-09

申请号：US12984524

申请日：2011-01-04

Applicant: Vishal Gauri ,  Raashina Humayun ,  Chi-I Lang ,  Judy H. Huang ,  Michael Barnes ,  Sunil Shanker

Inventor： Vishal Gauri ,  Raashina Humayun ,  Chi-I Lang ,  Judy H. Huang ,  Michael Barnes ,  Sunil Shanker

IPC: H01L21/4757

CPC classification number: H01L21/31 ,  C23C16/045 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/31608 ,  H01L21/76224

Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.

公开(公告)号：US20130125818A1

公开(公告)日：2013-05-23

申请号：US13302097

申请日：2011-11-22

Applicant: Jason Wright ,  Tony Chiang ,  Chi-I Lang

Inventor： Jason Wright ,  Tony Chiang ,  Chi-I Lang

IPC: C23C16/455 ,  C23C16/50

CPC classification number: C23C16/45565 ,  C23C16/54

Abstract: In some embodiments of the present invention, one or more small spot showerhead apparatus are used to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.

Abstract translation: 在本发明的一些实施例中，使用一个或多个小型喷头头装置，以分离，组合的方式在小斑点上沉积使用CVD，PECVD，ALD或PEALD的材料。 小型喷头可配置在更大的组合喷淋头内，以允许以组合方式沉积多层胶片堆叠。

公开(公告)号：US08440259B2

公开(公告)日：2013-05-14

申请号：US12013729

申请日：2008-01-14

Applicant: Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

Inventor： Tony P. Chiang ,  Sunil Shanker ,  Chi-I Lang

IPC: C23C16/00

CPC classification number: C23C16/45574 ,  C23C16/45544 ,  C23C16/45548

Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

公开(公告)号：US08432177B2

公开(公告)日：2013-04-30

申请号：US12952983

申请日：2010-11-23

Applicant: Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC: G01R31/26

CPC classification number: G01R31/26 ,  G01N21/55 ,  G01R31/2607 ,  H02S50/10

Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.

公开(公告)号：US08426970B2

公开(公告)日：2013-04-23

申请号：US12979627

申请日：2010-12-28

Applicant: Zachary Fresco ,  Chi-I Lang ,  Sandra G. Malhotra ,  Tony P. Chiang ,  Thomas R. Boussie ,  Nitin Kumar ,  Jinhong Tong ,  Anh Duong

Inventor： Zachary Fresco ,  Chi-I Lang ,  Sandra G. Malhotra ,  Tony P. Chiang ,  Thomas R. Boussie ,  Nitin Kumar ,  Jinhong Tong ,  Anh Duong

IPC: H01L23/52 ,  H01L23/532

CPC classification number: H01L21/288 ,  B82Y30/00 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/7685

Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.

公开(公告)号：US08252685B2

公开(公告)日：2012-08-28

申请号：US13289279

申请日：2011-11-04

Applicant: Anh Ngoc Duong ,  Chi-I Lang

Inventor： Anh Ngoc Duong ,  Chi-I Lang

IPC: H01L21/44

CPC classification number: H01L21/288 ,  H01L21/02074 ,  H01L21/7684 ,  H01L21/76849

Abstract: Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and a conductive region, introducing a hydroquinone to the substrate after cleaning the substrate using the preclean operation, and forming a capping layer over the conductive region of the substrate after introducing the hydroquinone.

Abstract translation: 描述了改进处理的半导体衬底的特性的技术，包括使用预清洗工艺清洗衬底，所述衬底包括电介质区域和导电区域，在使用预清洗操作清洁衬底之后，将氢醌引入衬底，并形成封盖 在引入氢醌之后，在衬底的导电区域上方。

公开(公告)号：US20120136468A1

公开(公告)日：2012-05-31

申请号：US12957346

申请日：2010-11-30

Applicant: Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

Inventor： Yun Wang ,  Tony P. Chiang ,  Chi-I Lang

IPC: G06F19/00 ,  G01R31/26

CPC classification number: G01R31/2858

Abstract: An apparatus and method for testing electromigration in semiconductor devices includes providing an electromigration test structure, where the electromigration test structure includes a first metal line; a metal bridge operatively coupled to the first metal line; a second metal line operatively coupled to the metal bridge; a barrier layer surrounding the electromigration test structure; current contact pads; and voltage contact pads. The current contact pads are connected to a current source and the voltage contact pads are connected to a voltage source. The barrier layer is exposed to the elevated current density as current travels from the first metal line across the barrier layer through the metal bridge to the second metal line.

Abstract translation: 一种用于测试半导体器件中的电迁移的装置和方法，包括提供电迁移测试结构，其中电迁移测试结构包括第一金属线; 操作地连接到第一金属线的金属桥; 可操作地耦合到所述金属桥的第二金属线; 围绕电迁移测试结构的阻挡层; 当前接触垫; 和电压接触垫。 当前接触焊盘连接到电流源，并且电压接触焊盘连接到电压源。 当电流从第一金属线穿过阻挡层穿过金属桥到第二金属线时，阻挡层暴露于升高的电流密度。