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公开(公告)号:US11646226B2
公开(公告)日:2023-05-09
申请号:US16871400
申请日:2020-05-11
发明人: Wenyi Liu , Wei Tang , Srinivas Gandikota , Yixiong Yang , Yong Wu , Jianqiu Guo , Arkaprava Dan , Mandyam Sriram
IPC分类号: H01L21/768 , H01L21/285
CPC分类号: H01L21/76843 , H01L21/28556 , H01L21/28568
摘要: A method for forming a metal nitride layer on a substrate includes exposing a substrate having features formed therein to a first deposition gas mixture including metal source material in a processing chamber to deposit metal source material in the features, supplying a first purge gas mixture into the processing chamber to remove excess metal source material and reaction byproducts from the processing chamber, exposing the substrate to a second deposition gas mixture including a nitride source compound in the processing chamber to form no more than one monolayer of metal nitride, supplying a second purge gas mixture into the processing chamber to remove excess nitride source compound and reaction byproducts from the processing chamber, and exposing the substrate to plasma using a microwave plasma source.
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公开(公告)号:US11587936B2
公开(公告)日:2023-02-21
申请号:US17335287
申请日:2021-06-01
发明人: Yixiong Yang , Jacqueline S. Wrench , Yong Yang , Srinivas Gandikota , Annamalai Lakshmanan , Joung Joo Lee , Feihu Wang , Seshadri Ganguli
IPC分类号: H01L27/108 , H01L21/285 , C23C16/455 , H01L21/02 , H01L21/8234
摘要: Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.
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公开(公告)号:US11417517B2
公开(公告)日:2022-08-16
申请号:US16951858
申请日:2020-11-18
摘要: A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer.
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公开(公告)号:US11384432B2
公开(公告)日:2022-07-12
申请号:US14734838
申请日:2015-06-09
发明人: Muhammad M. Rasheed , Srinivas Gandikota , Mario Dan Sanchez , Guoqiang Jian , Yixiong Yang , Deepak Jadhav , Ashutosh Agarwal
IPC分类号: C23C16/455 , C23C16/44 , C23C16/452 , H01J37/32
摘要: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate processing chamber includes: a chamber body; a chamber lid assembly having a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; and a gas distribution plate disposed below the lid plate and having a plurality of apertures disposed through the gas distribution plate.
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公开(公告)号:US11289579B2
公开(公告)日:2022-03-29
申请号:US17034116
申请日:2020-09-28
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
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公开(公告)号:US20210288086A1
公开(公告)日:2021-09-16
申请号:US16819023
申请日:2020-03-13
发明人: Luping Li , Jacqueline S. Wrench , Wen Ting Chen , Yixiong Yang , In Seok Hwang , Shih Chung Chen , Srinivas Gandikota
IPC分类号: H01L27/146 , C23C16/455 , C23C16/20 , C23C16/14
摘要: Methods and apparatus for forming reflector films are described A liner is formed on a substrate surface followed by formation of the reflector layer so that there is no oxygen exposure between liner and reflector layer formation. In some embodiments, a high aspect ratio structure is filled with a reflector material by partially filling the structure with the reflector material while growth is inhibited at a top portion of the structure, reactivating the top portion of the substrate and then filling the structure with the reflector material.
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公开(公告)号:US11062900B2
公开(公告)日:2021-07-13
申请号:US16699712
申请日:2019-12-01
发明人: Luping Li , Shih Chung Chen , Kazuya Daito , Lin Dong , Zhebo Chen , Yixiong Yang , Steven Hung
IPC分类号: H01L21/02 , H01L21/311
摘要: Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.
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公开(公告)号:US20210134972A1
公开(公告)日:2021-05-06
申请号:US17089047
申请日:2020-11-04
发明人: Yixiong Yang , Jacqueline S. Wrench , Srinivas Gandikota , Yongjing Lin , Steven C.H. Hung , Shih Chung Chen , Haoyan Sha , Chi-Chou Lin
摘要: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiment comprise MoN as a PMOS work function material. Some embodiments comprise TiSiN as a high-κ capping layer. Some embodiments provide improved PMOS bandedge performance. Some embodiments provide improved PMOS bandedge performance with reduced EOT penalty.
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公开(公告)号:US20210098581A1
公开(公告)日:2021-04-01
申请号:US17034116
申请日:2020-09-28
发明人: Yongjing Lin , Karla M. Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C.H. Hung , Srinivas Gandikota
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
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公开(公告)号:US20200381295A1
公开(公告)日:2020-12-03
申请号:US16886116
申请日:2020-05-28
发明人: Anqing Cui , Dien-Yeh Wu , Wei V. Tang , Yixiong Yang , Bo Wang
IPC分类号: H01L21/768 , H01L21/02 , H01L21/48
摘要: Process chamber lid assemblies and process chambers comprising same are described. The lid assembly has a housing with a gas dispersion channel in fluid communication with a lid plate. A contoured bottom surface of the lid plate defines a gap to a top surface of a gas distribution plate. A pumping channel is formed between an upper outer peripheral contour of the gas distribution plate and the lid plate.
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