Increasing an electrical resistance of a resistor by oxidation or nitridization

    公开(公告)号:US06730984B1

    公开(公告)日:2004-05-04

    申请号:US09712391

    申请日:2000-11-14

    IPC分类号: H01L2900

    摘要: A method and structure for increasing an electrical resistance of a resistor that is within a semiconductor structure, by oxidizing or nitridizing a fraction of a surface layer of the resistor with oxygen/nitrogen (i.e., oxygen or nitrogen) particles, respectively. The semiconductor structure may include a semiconductor wafer, a semiconductor chip, and an integrated circuit. The method and structure comprises five embodiments. The first embodiment comprises heating an interior of a heating chamber that includes the oxygen/nitrogen particles as gaseous oxygen/nitrogen-comprising molecules (e.g., molecular oxygen/nitrogen). The second embodiment comprises heating the fraction of the surface layer by a beam of radiation (e.g., laser radiation), or a beam of particles, such that the semiconductor structure is within a chamber that includes the oxygen/particles as gaseous oxygen/nitrogen-comprising molecules (e.g., molecular oxygen/nitrogen). The third embodiment comprises: using a plasma chamber to generate plasma oxygen/nitrogen ions; and applying a DC voltage to the plasma oxygen/nitrogen ions to accelerate the plasma oxygen/nitrogen ions into the resistor such that the oxygen/nitrogen particles include the plasma oxygen/nitrogen ions. The fourth embodiment comprises using an anodization circuit to electrolytically generate oxygen/nitrogen ions in an electrolytic solution in which the resistor is immersed, wherein the oxygen/nitrogen particles include the electrolytically-generated oxygen/nitrogen ions. The fifth embodiment comprises immersing the semiconductor structure in a chemical solution which includes the oxygen/nitrogen particles, wherein the oxygen/nitrogen particles may include oxygen/nitrogen-comprising liquid molecules, oxygen/nitrogen ions, or an oxygen/nitrogen-comprising gas dissolved in the chemical solution under pressurization.

    Integrated on-chip half-wave dipole antenna structure

    公开(公告)号:US06563464B2

    公开(公告)日:2003-05-13

    申请号:US09811940

    申请日:2001-03-19

    IPC分类号: H01Q138

    摘要: A semiconductor device is presented which is composed of two adjacent semiconductor chips. Each semiconductor chip has an integrated half-wave dipole antenna structure located thereon. The semiconductor chips are oriented so that the half-wave dipole antenna segments extend away from each other, allowing the segments to be effectively mated and thus form a complete full-wave dipole antenna. The two solder bumps which form the antenna are separated by a gap of approximately 200 microns. The length of each solder bump antenna is based on the wavelength and the medium of collection. Phased array antenna arrays may also be constructed from a plurality of these semiconductor chip antennae.

    Vertical trench-formed dual-gate FET device structure and method for creation
    27.
    发明授权
    Vertical trench-formed dual-gate FET device structure and method for creation 失效
    垂直沟槽形双栅FET器件结构及其制作方法

    公开(公告)号:US06406962B1

    公开(公告)日:2002-06-18

    申请号:US09761931

    申请日:2001-01-17

    IPC分类号: H01L21336

    摘要: The present invention relates to an apparatus and method of forming one or more FETs having a vertical trench-formed double-gate, with a plurality of nitride layers having oxide marker etch-stop layers provided periodically there-through, thereby adapting the FETs to have a plurality of selectable gate lengths. The present invention provides for control and formation of gate lengths scaled down to about 5 nm to about 100 nm, preferably from about 5 nm to about 50 nm. The plurality of pad nitride layers with the oxide etch-stop layers provide for the present FET to be connected to a plurality of contacts having a variety of connection depths corresponding to the gate lengths used, by etching a plurality of via in the pad nitride layers whereby such vias stop at selected ones of the etch-stop layers to provide vias adapted to connect with the selected ones of such contacts. Additional gate material may be deposited over a top surface of the selected plurality of nitride layers to allow for contacts to the gate electrodes of any given FET.

    摘要翻译: 本发明涉及一种形成具有垂直沟槽形成的双栅极的一个或多个FET的装置和方法,其中多个氮化物层具有周期性地设置在其上的氧化物标记蚀刻停止层,从而使FET具有 多个可选择的栅极长度。 本发明提供控制和形成尺寸缩小到约5nm至约100nm,优选约5nm至约50nm的栅极长度。 具有氧化物蚀刻停止层的多个衬垫氮化物层通过蚀刻衬垫氮化物层中的多个通孔来提供本FET连接到具有对应于所使用的栅极长度的各种连接深度的多个触点 由此这些通孔在选定的蚀刻停止层处停止以提供适于与所选择的这些触点连接的通孔。 附加的栅极材料可以沉积在所选择的多个氮化物层的顶表面上,以允许与任何给定FET的栅电极的接触。

    Methods, devices, and infrastructure systems for separating, removing, compressing, and generating hydrogen
    29.
    发明授权
    Methods, devices, and infrastructure systems for separating, removing, compressing, and generating hydrogen 失效
    用于分离,去除,压缩和产生氢气的方法,装置和基础设施系统

    公开(公告)号:US07955491B2

    公开(公告)日:2011-06-07

    申请号:US10941041

    申请日:2004-09-14

    IPC分类号: C25B1/02 C25B9/08

    摘要: Hydrogen pumps include a proton conducting medium, and a nonporous hydrogen permeable anode electrode and/or nonporous hydrogen permeable cathode electrode. For example, the electrodes may be a solid thin metallic film such as palladium or a palladium alloy such as a palladium-copper alloy that allow for hydrogen permeation but not impurities, and thus, purifying a supply containing hydrogen. The proton conducting medium may be a solid anhydrous proton conducting medium disposed between the anode electrode and the cathode electrode. The anode electrode and the cathode electrode may be directly sealed to at least one of the proton conducting medium, a first member for distributing the supply containing hydrogen to the anode electrode, a second member for collecting a supply of purified hydrogen, and a gasket disposed around the proton conducting medium.

    摘要翻译: 氢泵包括质子传导介质和无孔氢可渗透阳极电极和/或无孔氢可渗透阴极电极。 例如,电极可以是诸如钯或钯 - 铜合金的实体薄金属膜,例如允许氢渗透而不是杂质的钯 - 铜合金,从而净化含氢的电源。 质子传导介质可以是设置在阳极和阴极之间的固体无水质子传导介质。 阳极电极和阴极可以直接密封到质子传导介质,用于将含氢的供给分配到阳极的第一构件,用于收集纯化氢的供应的第二构件和设置的垫圈中的至少一个 围绕质子传导介质。