公开(公告)号：US6124815A

公开(公告)日：2000-09-26

申请号：US89495

申请日：1998-06-02

申请人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

发明人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

IPC分类号： H03M3/04 ,  H03M1/66

CPC分类号： H03M3/352 ,  H03M3/50

摘要： A integrated circuit digital to analog converter converts an M-bit digital signal to an analog output signal. The analog output signal can be used to drive external devices such as an off-chip driver. The output of the external device is sampled and fed back across the discrete time/continuous time interface on the chip to the input of the analog to digital converter. Taking the feedback point after the external device ensures relatively high performance for noise and linearity using relatively low performance components, both on and off the chip.

摘要翻译： 集成电路数模转换器将M位数字信号转换为模拟输出信号。 模拟输出信号可用于驱动外部设备，如片外驱动器。 对外部器件的输出进行采样，并将芯片上的离散时间/连续时间接口反馈到模数转换器的输入端。 在外部器件之后采取反馈点，使用相对较低性能的器件（芯片上和芯片上），确保噪声和线性度的相对较高的性能。

公开(公告)号：US6124814A

公开(公告)日：2000-09-26

申请号：US89490

申请日：1998-06-02

申请人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

发明人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

IPC分类号： H03M3/04 ,  H03M1/66

CPC分类号： H03M3/368 ,  H03M3/50

摘要： A digital to analog converter converts an N-bit digital signal into an M-bit digital signal and provides the M-bit digital signal to a conversion circuit which converts the M-bit signal to an analog output signal. The analog output signal is sampled and fed back across the discrete time/continuous time interface to the input of the conversion circuit. An interpolation filter is used to increase the apparent sampling rate of the incoming N-bit signal.

摘要翻译： 数模转换器将N位数字信号转换为M位数字信号，并将M位数字信号提供给将M位信号转换为模拟输出信号的转换电路。 模拟输出信号被采样并通过离散时间/连续时间接口反馈到转换电路的输入端。 内插滤波器用于增加输入N位信号的表观采样率。

公开(公告)号：US6121909A

公开(公告)日：2000-09-19

申请号：US89488

申请日：1998-06-02

申请人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

发明人： Wai Laing Lee ,  Axel Thomsen ,  Lei Wang ,  Dan Kasha

IPC分类号： H03M3/02 ,  H03M1/66

CPC分类号： H03M3/50

摘要： A 1-bit digital to analog converter uses both discrete time and continuous time processing to produce an analog output signal. The analog output signal is sampled and fed back across the discrete time/continuous time interface to the input of the conversion circuit. In one implementation, the discrete time processing uses an integrator chain of switched capacitor integrators and a switched capacitor low pass filter. The continuous time processor is a 2 pole low pass filter. A finite impulse response filter can precede the discrete time processing. A plurality of analog output sampling arrangements can be selectively applied accommodate a variety of operational conditions.

摘要翻译： 1位数模转换器使用离散时间和连续时间处理来产生模拟输出信号。 模拟输出信号被采样并通过离散时间/连续时间接口反馈到转换电路的输入端。 在一个实现中，离散时间处理使用开关电容器积分器的积分器链和开关电容器低通滤波器。 连续时间处理器是2极低通滤波器。 有限脉冲响应滤波器可以在离散时间处理之前。 可以选择性地应用多个模拟输出采样装置来适应各种操作条件。

公开(公告)号：US06002299A

公开(公告)日：1999-12-14

申请号：US872424

申请日：1997-06-10

申请人： Axel Thomsen

发明人： Axel Thomsen

IPC分类号： H03M1/12 ,  H03F1/08 ,  H03F1/26 ,  H03F1/30 ,  H03F1/34 ,  H03F3/34 ,  H03F3/45 ,  H03F1/02 ,  H03F1/36

CPC分类号： H03F3/45968 ,  H03F1/083 ,  H03F1/303 ,  H03F3/45775 ,  H03F2200/331 ,  H03F2200/81

摘要： An amplifier is disclosed including at least three integrator stages connected to provide a low-frequency path from a signal input to a signal output, and a relatively high-frequency bypass path around the first integrator stage. The first integrator stage uses dynamic offset reduction such as chopper stabilization, and an analog low-pass filter reduces artifacts of the dynamic offset reduction. The paths converge at a current summing node. To prevent instability when the integrators are saturated by large signals, the paths have respective saturation current limits selected so that the relatively high-frequency path is not saturated when the low-frequency path saturates. To ensure that the conditional stability is substantially unaffected by adjustment of closed-loop gain, a current feedback input adjusts the open-loop gain in a fashion inversely proportional to resistance presented to the current feedback input by a feedback circuit.

摘要翻译： 公开了一种放大器，其包括至少三个积分器级，其连接以提供从信号输入到信号输出的低频路径，以及围绕第一积分器级的相对高频旁路。 第一个积分器级使用动态偏移降低，如斩波稳定，模拟低通滤波器减少动态偏移减少的伪像。 路径收敛在当前求和节点处。 为了防止当积分器被大信号饱和时的不稳定性，路径具有选择的相应的饱和电流极限，使得当低频路径饱和时相对高频路径不饱和。 为了确保条件稳定性基本上不受调节闭环增益的影响，电流反馈输入以与由反馈电路呈现给电流反馈输入的电阻成反比的方式调节开环增益。

公开(公告)号：US09099994B2

公开(公告)日：2015-08-04

申请号：US13721885

申请日：2012-12-20

申请人： Axel Thomsen ,  Pavel Konecny ,  Xiaodong Wang

发明人： Axel Thomsen ,  Pavel Konecny ,  Xiaodong Wang

IPC分类号： H03K3/011 ,  H03K3/0231

CPC分类号： H03K3/0231

摘要： In an embodiment, a method includes: during a first portion of a cycle of a clock signal generated by an oscillator, pre-charging a first capacitor of a first switched capacitor stage until a first comparator determines that a first node voltage of the first switched capacitor stage is greater than a first reference voltage at a first reference voltage node; applying a second reference voltage to the first reference voltage node; and responsive to a first edge of the clock signal, charging the first capacitor until the first comparator determines that the first node voltage is greater than the second reference voltage at the first reference voltage node.

摘要翻译： 在一个实施例中，一种方法包括：在由振荡器产生的时钟信号的周期的第一部分期间，对第一开关电容器级的第一电容器进行预充电，直到第一比较器确定第一开关的第一节点电压 电容器级大于第一参考电压节点处的第一参考电压; 将第二参考电压施加到所述第一参考电压节点; 并且响应于所述时钟信号的第一边缘，对所述第一电容器充电直到所述第一比较器确定所述第一节点电压大于所述第一参考电压节点处的所述第二参考电压。

公开(公告)号：US08952839B2

公开(公告)日：2015-02-10

申请号：US13732113

申请日：2012-12-31

申请人： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen ,  Jinwen Xiao

发明人： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen ,  Jinwen Xiao

IPC分类号： H03M1/38 ,  H03K5/24 ,  H03M1/12 ,  H03M1/00 ,  H03M1/80 ,  H03M1/06

CPC分类号： H03M1/38 ,  H03K5/24 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/12 ,  H03M1/1225 ,  H03M1/1245 ,  H03M1/466 ,  H03M1/804

摘要： A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.

摘要翻译： 电路包括比较器，其包括第一输入端，第二输入端和输出端。 电路还包括被配置为选择性地耦合到第一和第二输入的多个电容性采样电路。 多个电容性采样电路中的每一个包括第一和第二电容器，并且包括被配置为分别将第一和第二电容器选择性地耦合到第一和第二输入端的第一和第二转换开关。 多个电容性采样电路中的所选择的一个电容性采样电路的第一和第二转换开关闭合，以在转换阶段将所选择的一个耦合到比较器的第一和第二输入端。

公开(公告)号：US20140184435A1

公开(公告)日：2014-07-03

申请号：US13732113

申请日：2012-12-31

申请人： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen ,  Jinwen Xiao

发明人： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen ,  Jinwen Xiao

IPC分类号： H03M1/38 ,  H03K5/24

CPC分类号： H03M1/38 ,  H03K5/24 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/12 ,  H03M1/1225 ,  H03M1/1245 ,  H03M1/466 ,  H03M1/804

摘要： A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.

摘要翻译： 电路包括比较器，其包括第一输入端，第二输入端和输出端。 电路还包括被配置为选择性地耦合到第一和第二输入的多个电容性采样电路。 多个电容性采样电路中的每一个包括第一和第二电容器，并且包括被配置为分别将第一和第二电容器选择性地耦合到第一和第二输入端的第一和第二转换开关。 多个电容性采样电路中的所选择的一个电容性采样电路的第一和第二转换开关闭合，以在转换阶段将所选择的一个耦合到比较器的第一和第二输入端。

公开(公告)号：US20140184331A1

公开(公告)日：2014-07-03

申请号：US13732135

申请日：2012-12-31

申请人： Axel Thomsen ,  Gang Yuan

发明人： Axel Thomsen ,  Gang Yuan

IPC分类号： H03F3/45

CPC分类号： H03F3/005 ,  H03F3/45197 ,  H03F3/45645 ,  H03F2203/45404 ,  H03F2203/45418 ,  H03F2203/45421 ,  H03F2203/45424 ,  H03F2203/45444 ,  H03F2203/45446 ,  H03F2203/45528 ,  H03F2203/45648

摘要： A method of operating an amplifier circuit having a pre-charge phase and a sample/conversion phase includes, during a pre-charge phase, charging first and second capacitors to first and second bias voltages. The first capacitor is coupled to a first input of an amplifier circuit, which has a second input and an output. The second capacitor is coupled to the second input. During a sample/conversion phase, the first input of the amplifier circuit is coupled to an input signal through the first capacitor to level-shift the input signal according to the first bias voltage and the output of the amplifier is coupled to the second input through the second capacitor to level shift a feedback signal according to the second bias voltage.

摘要翻译： 操作具有预充电阶段和采样/转换阶段的放大器电路的方法包括在预充电阶段期间将第一和第二电容器充电到第一和第二偏置电压。 第一电容器耦合到具有第二输入和输出的放大器电路的第一输入端。 第二电容器耦合到第二输入端。 在采样/转换阶段期间，放大器电路的第一输入通过第一电容耦合到输入信号，以根据第一偏置电压对输入信号进行电平移位，并且放大器的输出端通过 所述第二电容器根据所述第二偏置电压对反馈信号进行电平移位。

公开(公告)号：US20130222162A1

公开(公告)日：2013-08-29

申请号：US13408173

申请日：2012-02-29

申请人： Jinwen Xiao ,  Pavel Konecny ,  Axel Thomsen ,  Ka Y. Leung

发明人： Jinwen Xiao ,  Pavel Konecny ,  Axel Thomsen ,  Ka Y. Leung

IPC分类号： H03M1/10 ,  H03M1/66

CPC分类号： H03M1/1047 ,  H03M1/745 ,  H03M1/785

摘要： An input digital signal is converted to an analog signal using a main digital to analog converter (DAC) and a sub DAC. An offset value is subtracted from the input digital signal to generate an offset adjusted digital signal. The main DAC converts the offset adjusted digital signal to a first analog signal. A second digital signal is generated based on the offset value and a correction factor determined, at least in part, during calibration of the main DAC. The sub DAC converts the second digital to a second analog signal, which when combined with the first analog signal, provides an analog representation of the input digital signal.

摘要翻译： 使用主数模转换器（DAC）和子DAC将输入数字信号转换为模拟信号。 从输入数字信号中减去偏移值，以生成偏移调整数字信号。 主DAC将偏移调整后的数字信号转换为第一个模拟信号。 基于偏移值和至少部分地在主DAC的校准期间确定的校正因子来生成第二数字信号。 子DAC将第二数字转换为第二模拟信号，当与第一模拟信号组合时，其提供输入数字信号的模拟表示。

公开(公告)号：US08471629B2

公开(公告)日：2013-06-25

申请号：US13173791

申请日：2011-06-30

申请人： Axel Thomsen ,  Zhongda Wang ,  Sai Chu Wong ,  Yunteng Huang

发明人： Axel Thomsen ,  Zhongda Wang ,  Sai Chu Wong ,  Yunteng Huang

IPC分类号： H03F1/14 ,  H03G3/20

CPC分类号： H03G3/34 ,  H03G3/3042

摘要： A power control circuit is coupled to receive a feedback signal from a power amplifier (PA) and generate a control signal to control a variable gain amplifier (VGA) coupled to an input to the PA based on the feedback signal. The power control circuit may include, in one embodiment, a mute circuit to generate a mute signal to be provided to the VGA when the control signal is less than a first level and a clamp circuit to clamp a control voltage used to generate the control signal from exceeding a threshold level.

摘要翻译： 功率控制电路被耦合以从功率放大器（PA）接收反馈信号，并产生控制信号，以根据反馈信号控制耦合到PA的输入的可变增益放大器（VGA）。 在一个实施例中，功率控制电路可以包括静音电路，以在控制信号小于第一电平时产生要提供给VGA的静音信号，以及钳位电路来钳位用于产生控制信号的控制电压 超过阈值水平。