公开(公告)号：US20160027817A1

公开(公告)日：2016-01-28

申请号：US14421947

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol YOO ,  Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127

Abstract: Disclosed is an array substrate, a method of manufacturing the same, and a display device. The method of manufacturing an array substrate includes: forming a pattern comprising an active layer, a source, a drain, a data line and a pixel electrode on a base substrate through a single patterning process; forming a pattern of an insulating layer; forming a pattern comprising a gate and a gate line through a single patterning process. In the array substrate, the method of manufacturing the same, and the display device of the present invention, only two patterning processes are required to achieve the fabrication of the array substrate, which has less and simple process steps, thereby reduces the manufacturing complexity and manufacturing cost, and increasing the production efficiency and the economic benefit.

Abstract translation: 公开了一种阵列基板及其制造方法以及显示装置。 制造阵列基板的方法包括：通过单个图案化工艺在基底基板上形成包括有源层，源极，漏极，数据线和像素电极的图案; 形成绝缘层的图案; 通过单个图案化工艺形成包括栅极和栅极线的图案。 在阵列基板中，其制造方法和本发明的显示装置仅需要两个图案化工艺来实现阵列基板的制造，其具有较少且简单的工艺步骤，从而降低了制造复杂度， 制造成本，提高生产效率和经济效益。

公开(公告)号：US20160027812A1

公开(公告)日：2016-01-28

申请号：US14429501

申请日：2014-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： HeecheoI KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H01L27/12 ,  H01L23/31 ,  H01L23/00 ,  H01L29/66 ,  H01L23/528 ,  H01L21/56 ,  H01L21/441 ,  H01L29/24 ,  H01L23/522 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/1248 ,  H01L21/441 ,  H01L21/56 ,  H01L21/76831 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1262 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78636 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2224/08052 ,  H01L2924/13069

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes: a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate; a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes. The array substrate further includes: a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer and the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括：TFT的栅极电极和依次形成在基底基板上的栅极绝缘层; TFT的栅极绝缘层的一部分依次形成半导体有源层，蚀刻停止层以及源电极和漏电极，TFT的栅极电极和漏电极分别对应于TFT的栅电极 通过通孔与半导体活性层接触。 阵列基板还包括：形成在TFT的栅电极和栅极绝缘层之间的第一绝缘层和栅极电极在源极电极和漏电极之间的TFT的沟道区域处与栅极绝缘层接触 的TFT。

公开(公告)号：US20160013216A1

公开(公告)日：2016-01-14

申请号：US14852810

申请日：2015-09-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol YOO ,  Youngsuk SONG ,  Heecheol KIM ,  Seungjin CHOI

IPC: H01L27/12 ,  G02F1/1368 ,  H01L23/31 ,  H01L29/786 ,  H01L29/24 ,  H01L23/522 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: H01L27/1225 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  H01L21/77 ,  H01L23/3171 ,  H01L23/5226 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/7869 ,  H01L2224/24 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244

Abstract: An array substrate, a method of fabricating the same, and a liquid crystal display device are disclosed. The method comprises: sequentially forming a first transparent conductive material layer, an insulation material layer, a semiconductor material layer and a photoresist layer on a substrate base and forming patterns including a gate line, a gate, a gate insulation layer, a semiconductor layer and a first transparent electrode by patterning process; forming a passivation layer and forming a source via and a drain via connected to the semiconductor layer in the passivation layer; sequentially forming a second transparent conductive material layer and a source-drain metal layer and forming patterns including a source, a drain and a second transparent electrode by patterning process, the gate insulation layer is formed only on the gate and the gate line, the source and the drain include stacked second transparent conductive material layer and source-drain metal layer.

Abstract translation: 公开了阵列基板，其制造方法和液晶显示装置。 该方法包括：在衬底上依次形成第一透明导电材料层，绝缘材料层，半导体材料层和光致抗蚀剂层，并形成包括栅极线，栅极，栅绝缘层，半导体层和 通过图案化工艺的第一透明电极; 形成钝化层，并形成连接到钝化层中的半导体层的源极通孔和漏极通孔; 顺序地形成第二透明导电材料层和源极 - 漏极金属层，并且通过图案化工艺形成包括源极，漏极和第二透明电极的图案，栅极绝缘层仅形成在栅极和栅极线上，源极 并且漏极包括层叠的第二透明导电材料层和源极 - 漏极金属层。

公开(公告)号：US20160260754A1

公开(公告)日：2016-09-08

申请号：US14443474

申请日：2014-10-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang SUN ,  Seungjin CHOI ,  Jing NIU ,  Fangzhen ZHANG

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1333 ,  H01L29/786 ,  G02F1/1368

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/13625 ,  G02F2001/136295 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L27/32 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78642 ,  H01L29/7869 ,  H01L29/78696

Abstract: An array substrate and manufacturing method thereof and a display device. The display device includes a pixel electrode, including a portion in a display region and a portion in a non-display region; a first electrode formed on the non-display region of the pixel electrode; a passivation layer formed on the pixel electrode and the first electrode, which includes a via hole located over the first electrode; an active layer and a second electrode that are formed on the passivation layer, the active layer being connected to the first electrode through the via hole of the passivation layer. With the array substrate and the manufacturing method thereof, the manufacturing cost is reduced, the corrosion to an electrode material is lessened, and quality of the array substrate is enhanced.

Abstract translation: 阵列基板及其制造方法以及显示装置。 显示装置包括：像素电极，包括显示区域中的一部分和非显示区域中的一部分; 形成在所述像素电极的非显示区域上的第一电极; 形成在所述像素电极和所述第一电极上的钝化层，所述钝化层包括位于所述第一电极上方的通孔; 形成在钝化层上的有源层和第二电极，有源层通过钝化层的通孔连接到第一电极。 利用阵列基板及其制造方法，制造成本降低，电极材料的腐蚀减弱，阵列基板的质量提高。

公开(公告)号：US20160247824A1

公开(公告)日：2016-08-25

申请号：US14768967

申请日：2014-11-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin CHOI ,  Youngjin SONG

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1222 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/1288

Abstract: An array substrate and a fabrication method thereof, and a display panel are provided. The array substrate includes a thin film transistor, and the fabrication method includes: forming an intermediate pattern; forming a pattern including a source electrode and a drain electrode of the thin film transistor, the source electrode of the thin film transistor being located on a source electrode ohmic contact region, and the drain electrode of the thin film transistor being located on a drain electrode ohmic contact region; forming a transparent electrode material layer, the transparent electrode material layer covering a substrate including the pattern of the source electrode and the drain electrode of the thin film transistor; patterning the transparent electrode material layer, to obtain a pattern including the pixel electrode; and patterning the intermediate pattern, to remove a channel ohmic contact region, and to remove a portion of a material of the channel active pattern region, so as to form an active layer of the thin film transistor.

Abstract translation: 提供阵列基板及其制造方法以及显示面板。 阵列基板包括薄膜晶体管，并且制造方法包括：形成中间图案; 形成包括薄膜晶体管的源极和漏电极的图案，薄膜晶体管的源电极位于源电极欧姆接触区上，薄膜晶体管的漏电极位于漏极上 欧姆接触区; 形成透明电极材料层，所述透明电极材料层覆盖包括所述薄膜晶体管的源电极和漏电极的图案的衬底; 图案化透明电极材料层，以获得包括像素电极的图案; 以及图案化中间图案，去除沟道欧姆接触区域，并去除沟道有源图案区域的材料的一部分，以便形成薄膜晶体管的有源层。

公开(公告)号：US20160007015A1

公开(公告)日：2016-01-07

申请号：US14415651

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H04N13/04 ,  G06T1/00 ,  G09G3/36 ,  G06T7/00 ,  G02B27/01 ,  H04N5/335

CPC classification number: H04N13/398 ,  G02B27/01 ,  G02B27/017 ,  G02B2027/0132 ,  G02B2027/0138 ,  G02B2027/014 ,  G02B2027/0178 ,  G02B2027/0187 ,  G06T1/0007 ,  G09G3/20 ,  G09G3/36 ,  H04N5/23293 ,  H04N5/335 ,  H04N13/344 ,  H04N2013/405

Abstract: The present invention provides an open head mount display device and a display method thereof, relates to the field of head mount display technology, and can solve technical problems (such as a tedious operation, a poor display effect, an inaccurate position of the display image or the like) of the open head mount display device in the prior art. The open head mount display device of the present invention comprises: a display unit for providing a display image to user's eyes; an image acquisition unit for acquiring an image of an external object; an image analysis unit for analyzing and determining a position of the external object relative to the user's eyes in accordance with the image acquired by the image acquisition unit; and an image adjusting unit for adjusting the display image in accordance with an analysis result of the image analysis unit.

Abstract translation: 本发明提供了一种开放式头戴式显示装置及其显示方法，涉及头戴式显示技术领域，并且可以解决技术问题（诸如繁琐的操作，显示效果差，显示图像的不准确的位置 或类似物）的开放式头戴式显示装置。 本发明的开放式头戴显示装置包括：用于向用户的眼睛提供显示图像的显示单元; 图像获取单元，用于获取外部对象的图像; 图像分析单元，用于根据由图像获取单元获取的图像分析和确定外部对象相对于用户的眼睛的位置; 以及图像调整单元，用于根据图像分析单元的分析结果调整显示图像。

公开(公告)号：US20150380433A1

公开(公告)日：2015-12-31

申请号：US14499210

申请日：2014-09-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO ,  Seungjin CHOI

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L29/41733 ,  H01L29/4175 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696

Abstract: The present invention provides a TFT, an array substrate and a display device. The TFT includes a gate electrode, a source electrode, a drain electrode, and a semiconductor layer. The source electrode and the drain electrode are arranged on different layers. The semiconductor layer is in electrical connection to the source electrode and the drain electrode, respectively; wherein, a region on the semiconductor layer which is corresponding to a region between the source electrode and the drain electrode is a channel region. The present invention also provides an array substrate and a display device comprising the on TFT.

Abstract translation: 本发明提供一种TFT，阵列基板和显示装置。 TFT包括栅电极，源电极，漏电极和半导体层。 源电极和漏极布置在不同的层上。 半导体层分别与源电极和漏电极电连接; 其中，所述半导体层上对应于所述源电极和所述漏电极之间的区域是沟道区。 本发明还提供一种阵列基板和包括TFT的显示装置。

公开(公告)号：US20150325603A1

公开(公告)日：2015-11-12

申请号：US14802241

申请日：2015-07-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L27/12 ,  H01L21/3213 ,  H01L21/311

CPC classification number: H01L27/1259 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2201/124 ,  H01L21/31127 ,  H01L21/32133 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3244

Abstract: An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions comprises a thin film transistor and further comprises: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer comprising at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer comprising at least one second electrode strip disposed on the protrusions.

Abstract translation: 公开了阵列基板，其制造方法和显示装置。 阵列基板包括多个栅极线和彼此相交以限定多个像素区域的多条数据线，每个像素区域包括薄膜晶体管，还包括：基底; 在基底基板上彼此分开布置的多于一个的突起; 第一电极层，包括设置在相邻突起之间的间隙中的至少一个第一电极条; 第二电极层，包括设置在突起上的至少一个第二电极条。

公开(公告)号：US20150303150A1

公开(公告)日：2015-10-22

申请号：US14406427

申请日：2014-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin CHOI ,  Heecheol KIM ,  Youngsuk SONG ,  Seongyeol YOO

IPC: H01L23/552 ,  H01L27/12

CPC classification number: H01L23/552 ,  H01L21/77 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/786 ,  H01L29/78633 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate and manufacturing method thereof, and a display device are provided. The array substrate comprises a TFT, an isolating layer (M), a pixel electrode (12) and a via (Q) formed through the isolating layer (14). A drain (6) of the TFT is electrically connected with the pixel electrode (12) through the via (Q). A first light blocking layer (14a) is formed on the pixel electrode (12) inside the via (Q). In the array substrate of the present invention, display effect deterioration due to the light reflection on pixel electrode inside the via is avoided by forming the light blocking layer on the pixel electrode inside the via. At the same time, prior to manufacturing the light blocking layer, a barrier layer is formed first to guarantee no residual of light blocking layer will be left on the substrate, thereby improving display performance of the display device.

Abstract translation: 提供阵列基板及其制造方法以及显示装置。 阵列基板包括TFT，隔离层（M），像素电极（12）和通过隔离层（14）形成的通孔（Q）。 TFT的漏极（6）通过通孔（Q）与像素电极（12）电连接。 在通孔（Q）内部的像素电极（12）上形成第一遮光层（14a）。 在本发明的阵列基板中，通过在通孔内部的像素电极上形成遮光层，避免了通孔内的像素电极的光反射引起的显示效果劣化。 同时，在制造遮光层之前，首先形成阻挡层，以确保不会在基板上留下残留的遮光层，从而提高显示装置的显示性能。