公开(公告)号：US06622288B1

公开(公告)日：2003-09-16

申请号：US09823146

申请日：2001-03-29

申请人： Yao-Ting Wang ,  Kent Richardson ,  Shao-Po Wu ,  Christophe Pierrat ,  Michael Sanie

发明人： Yao-Ting Wang ,  Kent Richardson ,  Shao-Po Wu ,  Christophe Pierrat ,  Michael Sanie

IPC分类号： G06F1750

CPC分类号： G03F1/30

摘要： Techniques for forming a design layout with phase-shifted features, such as an integrated circuit layout, include receiving information about a particular phase-shift conflict in a first physical design layout. The information indicates one or more features logically associated with the particular phase-shift conflict. Then the first physical design layout is adjusted based on that information to produce a second design layout. The adjustments rearrange features in a unit of the design layout to collect free space around a selected feature associated with the phase-shift conflict. With these techniques, a unit needing more space for additional shifters can obtain the needed space during the physical design process making the adjustment. The needed space so obtained allows the fabrication design process to avoid or resolve phase conflicts while forming a fabrication layout, such as a mask, for substantiating the design layout in a printed features layer, such as in an actual integrated circuit.

摘要翻译： 用于形成具有诸如集成电路布局的相移特征的设计布局的技术包括在第一物理设计布局中接收关于特定相移冲突的信息。 该信息指示与特定相移冲突逻辑关联的一个或多个特征。 然后根据该信息调整第一个物理设计布局以产生第二个设计布局。 调整重新排列设计布局中的功能，以收集与相移冲突相关的所选功能周围的可用空间。 利用这些技术，在进行调整的物理设计过程中，需要更多空间的单元可以获得额外的移位器的空间。 如此获得的所需空间允许制造设计过程避免或解决相位冲突，同时形成诸如掩模的制造布局，用于证实印刷特征层（例如在实际集成电路中）的设计布局。

公开(公告)号：US06560766B2

公开(公告)日：2003-05-06

申请号：US09917526

申请日：2001-07-26

申请人： Christophe Pierrat ,  Chin-hsen Lin ,  Yao-Ting Wang ,  Fang-Cheng Chang

发明人： Christophe Pierrat ,  Chin-hsen Lin ,  Yao-Ting Wang ,  Fang-Cheng Chang

IPC分类号： G06F1750

CPC分类号： G06F17/5081

摘要： One embodiment of the invention provides a system that analyzes a layout related to a circuit on a semiconductor chip using an instance-based representation of a set of geometrical features that comprise the layout. The system operates by receiving a representation of the layout, wherein the representation defines a plurality of nodes that include one or more geometrical features. Next, the system converts the representation into an instance-based representation by identifying multiple occurrences of identical node instances in the layout, wherein each node instance can be further processed without having to consider effects of external factors on the node instance. The system then performs an further processing on the instance-based representation by processing each node instance only once, whereby the processing does not have to be repeated on multiple occurrences of the node instance in the layout.

摘要翻译： 本发明的一个实施例提供一种系统，其使用包括布局的一组几何特征的基于实例的表示来分析与半导体芯片上的电路相关的布局。 系统通过接收布局的表示来操作，其中所述表示定义包括一个或多个几何特征的多个节点。 接下来，系统通过识别布局中相同的节点实例的多次发生，将表示转换为基于实例的表示，其中可以进一步处理每个节点实例而不必考虑外部因素对节点实例的影响。 然后，系统通过仅处理每个节点实例一次对基于实例的表示进行进一步的处理，由此在布局中的多个节点实例的出现上不必重复该处理。

公开(公告)号：US06551750B2

公开(公告)日：2003-04-22

申请号：US09810823

申请日：2001-03-16

申请人： Christophe Pierrat

发明人： Christophe Pierrat

IPC分类号： G03F900

CPC分类号： G03F1/32

摘要： A structure and method are provided to ensure self-aligned fabrication of a tri-tone attenuated phase-shifting mask. A sub-resolution, 0 degree phase, greater than 90% transmission rim is provided along the edge of an opaque region. The alignment of this sub-resolution rim with the opaque and attenuated regions of the mask is performed in a single patterning step. In one embodiment, a narrow opaque region can be replaced by a sub-resolution, 0 degree phase, greater than 90% transmission line.

公开(公告)号：US06524752B1

公开(公告)日：2003-02-25

申请号：US09669368

申请日：2000-09-26

申请人： Christophe Pierrat

发明人： Christophe Pierrat

IPC分类号： G03F900

CPC分类号： G03F1/30 ,  G03F1/36

摘要： Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of sub-resolution assist features within phase shift regions and optical proximity correction features to phase shift regions. Both opaque field phase shift masks and complementary binary masks defining interconnect structures and other types of structures that are not defined using phase shifting, necessary for completion of the layout of the layer are produced.

摘要翻译： 提供了技术，用于将相移技术的使用扩展到在集成电路层中复杂布局的掩模的实现，超出了过去已经限制了这种结构的所选临界尺寸特征，例如晶体管栅极。 该方法包括识别可以对其进行相移的特征，自动映射用于实现这些特征的相移区域，解决根据给定设计规则可能发生的相位冲突，以及在相移区域内应用子分辨率辅助特征 和光学邻近校正特征到相移区域。 产生不完整的场相移掩模和定义互连结构的互补二进制掩模和不使用相移定义的其它类型的结构，这些结构对于完成层的布局是必需的。

公开(公告)号：US06424882B2

公开(公告)日：2002-07-23

申请号：US09768000

申请日：2001-01-23

申请人： Christophe Pierrat

发明人： Christophe Pierrat

IPC分类号： G06F1900

CPC分类号： G03F1/29 ,  G03F7/70433

摘要： The shape of chrome patterns on an optical pattern transfer tool are adjusted to get a desired shape on a wafer in the manufacture of semiconductor devices, wherein very small regions on a photoresist are defined and these regions are controlled with a high degree of accuracy. The optical pattern transfer tool has first and second planar surfaces lying in substantially parallel planes and a plurality of opaque regions overlying the first planar surface. First and second steps formed between and the first and second planar surfaces at first and second edges, respectively, define a width of the first planar surface. Each of the opaque regions are spaced from one another and offset from one another such that they are alternately aligned along a length of the first planar surface, such that one of the opaque regions is aligned with a portion of the first edge and the next one of the opaque regions along the length is aligned with a portion of the second edge. As a result of improving the process latitude of the wordline level in DRAMS, the size of the wordline over nonactive areas is reduced so that a maximum area is given for active areas for the bit contact and the container.

摘要翻译： 调整光学图案转印工具上的铬图案的形状以在半导体器件的制造中在晶片上获得期望的形状，其中限定光致抗蚀剂上的非常小的区域，并且以高精度控制这些区域。 光学图案转印工具具有位于基本上平行的平面中的第一和第二平面表面和覆盖在第一平面表面上的多个不透明区域。 在第一和第二边缘处分别形成在第一和第二平面之间的第一和第二台阶分别限定第一平面的宽度。 每个不透明区域彼此间隔开并彼此偏移，使得它们沿着第一平面表面的长度交替排列，使得不透明区域中的一个与第一边缘的一部分对准，下一个 沿着长度的不透明区域与第二边缘的一部分对准。 作为DRAMS中字线级别的处理纬度得到改善的结果，减少了非活动区域上的字线大小，从而给出了位触点和容器的有效区域的最大面积。

公开(公告)号：US06418008B1

公开(公告)日：2002-07-09

申请号：US09798992

申请日：2001-03-06

申请人： Mark Jost ,  William Stanton ,  Christophe Pierrat

发明人： Mark Jost ,  William Stanton ,  Christophe Pierrat

IPC分类号： H01G4005

CPC分类号： H01L27/10852 ,  H01L21/3143 ,  H01L21/3212 ,  H01L27/10808 ,  H01L27/10855 ,  H01L28/84 ,  H01L28/91

摘要： A capacitor having a pear-shaped cross section is provided. In one embodiment, the pear-shaped capacitor is a stacked container capacitor used in a dynamic random access memory circuit with a bit-line-over-capacitor construction. Each capacitor is at a minimum bit line distance from all adjacent bit line contacts, and also at a minimum capacitor distance from all adjacent capacitors along a substantial portion of its perimeter.

摘要翻译： 提供具有梨形截面的电容器。 在一个实施例中，梨形电容器是用于具有位线电容器结构的动态随机存取存储器电路中的堆叠容器电容器。 每个电容器处于与所有相邻位线触点的最小位线距离，并且在与其周边的实质部分的所有相邻电容器的最小电容器距离处。

公开(公告)号：US06297879B1

公开(公告)日：2001-10-02

申请号：US09032100

申请日：1998-02-27

申请人： Baorui Yang ,  Christophe Pierrat

发明人： Baorui Yang ,  Christophe Pierrat

IPC分类号： G01N2100

CPC分类号： G01N21/8851 ,  G01N21/95607

摘要： A method of photomask inspection uses available technology in a novel fashion to detect defects on a photomask. The method involves inspecting a photomask using a modified microscope, image comparison software, and a CCD camera. The microscope is modified to view the photomask out of focus and at low magnifications. The photomask may be scanned at multiple focuses to implement the inspection. This image is then compared with a reference image, such as an image from another die or a database. Any discrepancies between the images indicate a defect in the photomask. Alternatively, the photomask is inspected using a low magnification, low NA objective in dark field image of the optical microscope.

摘要翻译： 光掩模检查的方法以新颖的方式使用可用技术来检测光掩模上的缺陷。 该方法包括使用改进的显微镜，图像比较软件和CCD相机检查光掩模。 显微镜被修改以查看光掩模失焦和低放大倍率。 可以在多个焦点上扫描光掩模以实现检查。 然后将该图像与诸如来自另一管芯或数据库的图像的参考图像进行比较。 图像之间的任何差异表示光掩模中的缺陷。 或者，使用光学显微镜的暗视野图像中的低放大率，低NA目标来检查光掩模。

公开(公告)号：US06272236B1

公开(公告)日：2001-08-07

申请号：US09618503

申请日：2000-07-18

申请人： Christophe Pierrat ,  James Burdorf

发明人： Christophe Pierrat ,  James Burdorf

IPC分类号： G06K982

CPC分类号： G06T7/0006 ,  G01N21/95607 ,  G03F1/84 ,  G03F7/70483 ,  G06T2207/30148

摘要： An improved technique for inspecting photomasks employs simulated images of the resist pattern. A simulated image of an original pattern is compared to a simulated image generated from a pattern captured from a photomask manufactured from the original pattern. Alternatively, simulated images generated from captured data from two different instances of the same original pattern formed in a photomask are compared.

摘要翻译： 用于检查光掩模的改进技术使用抗蚀剂图案的模拟图像。 将原始图案的模拟图像与从由原始图案制造的光掩模捕获的图案生成的模拟图像进行比较。 或者，比较从在光掩模中形成的相同原始图案的两个不同实例的捕获数据生成的模拟图像。

公开(公告)号：US06268091B1

公开(公告)日：2001-07-31

申请号：US09536947

申请日：2000-03-28

申请人： Christophe Pierrat

发明人： Christophe Pierrat

IPC分类号： G03F900

CPC分类号： G03F7/001 ,  G03F1/26 ,  G03F1/32

摘要： A subresolution grating composed of approximately circular contacts is fabricated around the border of the primary pattern of a photomask. As a result, resolution at the edges of the photomask pattern is improved when the pattern is printed on a wafer surface. In addition, the reduced leakage enables a more efficient use of the glass plate on which the photomask is fabricated as well as a more efficient use of the wafer surface as a result of being able to place patterns closer together.

摘要翻译： 在光掩模的主要图案的边界周围制造由大致圆形触点组成的分解光栅。 结果，当将图案印刷在晶片表面上时，光掩模图案的边缘处的分辨率得到改善。 此外，减少的泄漏使得能够更有效地使用其上制造光掩模的玻璃板，以及由于能够将图案更靠近在一起而更有效地利用晶片表面。

公开(公告)号：US06200906B1

公开(公告)日：2001-03-13

申请号：US09213742

申请日：1998-12-17

申请人： Shubneesh Batra ,  Christophe Pierrat

发明人： Shubneesh Batra ,  Christophe Pierrat

IPC分类号： H01L213065

CPC分类号： H01L21/308 ,  H01L21/0274 ,  H01L21/76804 ,  H01L29/8126

摘要： Stepped photoresist profiles provide various methods of forming profiles in an underlying substrate. The stepped photoresist profiles are formed in two layers of photoresist that are disposed over the substrate. The substrate is then etched twice using a respective opening in each photoresist layer to create a stepped profile in the substrate.

摘要翻译： 阶梯式光致抗蚀剂轮廓提供在下面的基底中形成轮廓的各种方法。 阶梯式光致抗蚀剂轮廓形成在两层光致抗蚀剂中，其设置在衬底上。 然后使用每个光致抗蚀剂层中的相应开口蚀刻两次基板，以在基板中形成台阶状。