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公开(公告)号：US11678584B2
公开(公告)日：2023-06-13
申请号：US17245882
申请日：2021-04-30
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Renu Whig , Phillip Mather , Kenneth Smith , Sanjeev Aggarwal , Jon Slaughter , Nicholas Rizzo
CPC classification number: H10N50/01 , B82Y25/00 , G01R33/0052 , G01R33/09 , G01R33/093 , G01R33/098 , H10B61/00 , H10N50/10 , H10N50/80 , H10N59/00
Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.
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公开(公告)号：USRE49404E1
公开(公告)日：2023-01-31
申请号：US15470997
申请日：2017-03-28
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Phillip Mather , Jon Slaughter , Nicholas Rizzo
Abstract: Three bridge circuits (101, 111, 121), each include magnetoresistive sensors coupled as a Wheatstone bridge (100) to sense a magnetic field (160) in three orthogonal directions (110, 120, 130) that are set with a single pinning material deposition and bulk wafer setting procedure. One of the three bridge circuits (121) includes a first magnetoresistive sensor (141) comprising a first sensing element (122) disposed on a pinned layer (126), the first sensing element (122) having first and second edges and first and second sides, and a first flux guide (132) disposed non-parallel to the first side of the substrate and having an end that is proximate to the first edge and on the first side of the first sensing element (122). An optional second flux guide (136) may be disposed non-parallel to the first side of the substrate and having an end that is proximate to the second edge and the second side of the first sensing element (122).
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公开(公告)号：US10600460B2
公开(公告)日：2020-03-24
申请号：US16157315
申请日：2018-10-11
Applicant: Everspin Technologies, Inc.
Inventor： Sarin Deshpande , Sanjeev Aggarwal , Jason Janesky , Jon Slaughter , Phillip Lopresti
Abstract: Spin-orbit-torque (SOT) control strip lines are provided along the sides of free layers in perpendicular magnetic tunnel junction devices. Current flowing through such SOT control strip lines injects spin current into the free layers such that spin torque is applied to the free layers. The spin torque can be used to force the magnetic state of the free layer to a particular state based on the direction of the current through the SOT control strip line. In other embodiments, the SOT provides an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction. Some embodiments have dedicated strip lines for a single magnetic tunnel junction such that a three-terminal device results. Other embodiments have multiple magnetic tunnel junctions sharing a strip line, where the strip line can be used to reset all of the magnetic tunnel junctions to the same state and can also be used as an assist such that individual magnetic tunnel junctions can be written using selection circuitry.
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公开(公告)号：US10347828B2
公开(公告)日：2019-07-09
申请号：US16230031
申请日：2018-12-21
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Renu Whig , Jijun Sun , Nicholas Rizzo , Jon Slaughter , Dimitri Houssameddine , Frederick Mancoff
Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.
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公开(公告)号：US20190147971A1
公开(公告)日：2019-05-16
申请号：US16242892
申请日：2019-01-08
Applicant: Everspin Technologies, Inc.
Inventor： Thomas Andre , Jon Slaughter , Dimitri Houssameddine , Syed M. Alam
Abstract: In some examples, a memory device may be configured to store data in either an original or an inverted state based at least in part on a state associated with one or more shorted bit cells. For instance, the memory device may be configured to identify a shorted bit cell within a memory array and to store the data in the memory array, such that a state of the data bit stored in the shorted bit cell matches the state associated with the shorted bit cell.
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Patent Agency Ranking
公开(公告)号：US20180226574A1
公开(公告)日：2018-08-09
申请号：US15941153
申请日：2018-03-30
Applicant: Everspin Technologies, Inc.
Inventor： Renu Whig , Jijun Sun , Nicholas Rizzo , Jon Slaughter , Dimitri Houssameddine , Frederick Mancoff
CPC classification number: H01L43/12 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.
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公开(公告)号：US20180158498A1
公开(公告)日：2018-06-07
申请号：US15831736
申请日：2017-12-05
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Sanjeev AGGARWAL , Sarin A. Deshpande , Jon Slaughter
Abstract: The present disclosure is directed to exemplary methods of manufacturing a magnetoresistive device. In one aspect, a method may include forming one or more regions of a magnetoresistive stack on a substrate, wherein the substrate includes at least one electronic device. The method also may include performing a sole annealing process on the substrate having the one or more magnetoresistive regions formed thereon, wherein the sole annealing process is performed at a first minimum temperature. Subsequent to performing the sole annealing process, the method may include patterning or etching at least a portion of the magnetoresistive stack. Moreover, subsequent to the step of patterning or etching the portion of the magnetoresistive stack, the method may include performing all additional processing on the substrate at a second temperature below the first minimum temperature.
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公开(公告)号：US09766301B2
公开(公告)日：2017-09-19
申请号：US14953572
申请日：2015-11-30
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Lianjun Liu , Phillip Mather , Jon Slaughter
CPC classification number: G01R33/0029 , G01R33/0041 , G01R33/04 , G01R33/098
Abstract: A magnitude and direction of at least one of a reset current and a second stabilization current (that produces a reset field and a second stabilization field, respectively) is determined that, when applied to an array of magnetic sense elements, minimizes the total required stabilization field and reset field during the operation of the magnetic sensor and the measurement of the external field. Therefore, the low field sensor operates optimally (with the highest sensitivity and the lowest power consumption) around the fixed external field operating point. The fixed external field is created by other components in the sensor device housing (such as speaker magnets) which have a high but static field with respect to the low (earth's) magnetic field that describes orientation information.
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公开(公告)号：US09721632B2
公开(公告)日：2017-08-01
申请号：US15406684
申请日：2017-01-14
Applicant: Everspin Technologies, Inc.
Inventor： Dimitri Houssameddine , Jon Slaughter
CPC classification number: G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1695 , G11C11/1697 , G11C29/70 , G11C29/74 , G11C29/838 , G11C2213/78 , G11C2213/79
Abstract: Memory cells in a spin-torque magnetic random access memory (MRAM) include at least two magnetic tunnel junctions within each memory cell, where each memory cell only stores a single data bit of information. Access circuitry coupled to the memory cells are able to read from and write to a memory cell even when one of the magnetic tunnel junctions within the memory cell is defective and is no longer functional. Self-referenced and referenced reads can be used in conjunction with the multiple magnetic tunnel junction memory cells. In some embodiments, writing to the memory cell forces all magnetic tunnel junctions into a known state, whereas in other embodiments, a subset of the magnetic tunnel junctions are forced to a known state.
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公开(公告)号：USRE46428E1
公开(公告)日：2017-06-06
申请号：US15165600
申请日：2016-05-26
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor： Phillip Mather , Jon Slaughter , Nicholas Rizzo
CPC classification number: H01L27/22 , B82Y25/00 , G01R33/093 , H01L43/08
Abstract: Three bridge circuits (101, 111, 121), each include magnetoresistive sensors coupled as a Wheatstone bridge (100) to sense a magnetic field (160) in three orthogonal directions (110, 120, 130) that are set with a single pinning material deposition and bulk wafer setting procedure. One of the three bridge circuits (121) includes a first magnetoresistive sensor (141) comprising a first sensing element (122) disposed on a pinned layer (126), the first sensing element (122) having first and second edges and first and second sides, and a first flux guide (132) disposed non-parallel to the first side of the substrate and having an end that is proximate to the first edge and on the first side of the first sensing element (122). An optional second flux guide (136) may be disposed non-parallel to the first side of the substrate and having an end that is proximate to the second edge and the second side of the first sensing element (122).
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