Abstract:
Phase change memory devices and methods for manufacturing the same are provided. An exemplary embodiment of a phase change memory device includes a first electrode disposed in a first dielectric layer. A second dielectric layer is disposed over the first dielectric layer and the first electrode. A phase change material layer disposed in the second dielectric layer to electrically contact the first electrode. A third dielectric layer is disposed over the second dielectric layer. A second electrode is disposed in the third dielectric layer to electrically connect the phase change material layer and at least one gap disposed in the first dielectric layer or the second dielectric layer to thereby isolate portions of the phase change material layer and portions of the first or second dielectric layer adjacent thereto.
Abstract:
A phase-change memory is provided. The phase-change memory comprises first and second electrodes, wherein the first and second electrodes comprise phase-change material. A conductive path is formed between the first and second electrodes and electrically connects the first and second electrodes, wherein the conductive path comprises an embedded metal layer and a phase-change layer resulting in current from the first electrode to the second electrode or from the second electrode to the first electrode passing through the embedded metal layer and the phase change layer.
Abstract:
A method of manufacturing a resistive memory device is provided. A bottom electrode and a cup-shaped electrode connected to the bottom electrode are formed in an insulating layer. A cover layer extends along a first direction is formed and covers a first area surrounded by the cup-shaped electrode and exposes a second area and a third area surrounded by the cup-shaped electrode. A sacrificial layer is formed above the insulating layer. A stacked layer extends along a second direction and covers the second area surrounded by the cup-shaped electrode and a portion of the corresponding cover layer is formed. A conductive spacer material layer is formed on the stacked layer and the sacrificial layer. By using the sacrificial layer as an etch stop layer, the conductive spacer material layer is etched to form a conductive spacer at the sidewall of the stacked layer.
Abstract:
A memory cell includes a memory element, a current-limiting element electrically coupled to the memory element, and a high-selection-ratio element electrically coupled to the current-limiting element. The memory element is configured to store data as a resistance state. The current-limiting element is a voltage-controlled resistor (VCR) having a resistance that decreases when a voltage applied thereto increases. The high-selection-ratio element has a first resistance that is small when a voltage applied to the memory cell is approximately equal to a selection voltage of the memory cell, and has a second resistance that is substantially larger than the first resistance when the voltage applied to the memory cell is approximately equal to one-half of the selection voltage.
Abstract:
A resistance switching memory is introduced herein. The resistance switching memory includes a highly-insulating or resistance-switching material formed to cover the sidewall of a patterned metal line, and extended alongside a dielectric layer sidewall to further contact a portion of the top surface of the lower electrode. The other part of the top surface of the lower electrode is covered by an insulating layer between the top electrode and the lower electrode. An oxygen gettering metal layer in the lower electrode occupies a substantial central part of the top surface of the lower electrode and is partially covered by the highly-insulating or resistance-switching material. A switching area is naturally very well confined to the substantial central part of the oxygen gettering metal layer of the lower electrode.
Abstract:
A resistance switching memory is introduced herein. The resistance switching memory includes a highly-insulating or resistance-switching material formed to cover the sidewall of a patterned metal line, and extended alongside a dielectric layer sidewall to further contact a portion of the top surface of the lower electrode. The other part of the top surface of the lower electrode is covered by an insulating layer between the top electrode and the lower electrode. An oxygen gettering metal layer in the lower electrode occupies a substantial central part of the top surface of the lower electrode and is partially covered by the highly-insulating or resistance-switching material. A switching area is naturally very well confined to the substantial central part of the oxygen gettering metal layer of the lower electrode.
Abstract:
A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers.
Abstract:
A phase-change memory element. The phase-change memory element comprises a first electrode and a second electrode. A first phase change layer is electrically coupled to the first electrode. A second phase change layer is electrically coupled to the second electrode. A conductive bridge is formed between and electrically coupled to the first and second phase change layers.
Abstract:
A method of photolithographic exposure is disclosed. The photolithographic exposure method comprises providing a substrate, forming a first resist layer thereon, forming a second resist layer on the first resist layer, the second resist layer providing a transmission which first increases then decreases as exposure dose increases, and exposing the second resist layer.