公开(公告)号：US20080068656A1

公开(公告)日：2008-03-20

申请号：US11855891

申请日：2007-09-14

申请人： Hajime Sato

发明人： Hajime Sato

IPC分类号： G06F15/00

CPC分类号： H04N1/32363 ,  H04N1/32609 ,  H04N1/32635 ,  H04N1/32673 ,  H04N1/32678 ,  H04N2201/0082 ,  H04N2201/3288 ,  H04N2201/3298

摘要： A printing apparatus includes a built-in hard disk drive configured to operate as a mass storage device. The printing apparatus includes an HDD control unit configured to store print image data into the hard disk drive; a secondary storage unit configured to store the print image data; an HDD state detection unit configured to detect a state of the hard disk drive; and a storage method changing unit configured to change a storage method of the print image data based on the state of the hard disk drive detected by the HDD state detection unit.

摘要翻译： 打印设备包括被配置为作为大容量存储设备操作的内置硬盘驱动器。 打印设备包括：HDD控制单元，被配置为将打印图像数据存储到硬盘驱动器中; 配置为存储打印图像数据的次要存储单元; HDD状态检测单元，被配置为检测硬盘驱动器的状态; 以及存储方法改变单元，被配置为基于由HDD状态检测单元检测到的硬盘驱动器的状态来改变打印图像数据的存储方法。

公开(公告)号：US07248525B2

公开(公告)日：2007-07-24

申请号：US11070888

申请日：2005-03-03

申请人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

发明人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

IPC分类号： G11C7/00

CPC分类号： G11C7/02 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4085 ,  G11C2211/4065 ,  G11C2211/4068

摘要： A refresh method for a semiconductor memory device features high noise resistance, lower power consumption, and lower cost. All word lines of one or more memory cell blocks that have not been selected in a self refresh mode are controlled to have a floating potential substantially at ground level. Even when a word line and a bit line are short-circuited, this control prevents destruction of memory cell information, which may be caused by noise, and also prevents generation of leakage current. A fuse, etc., for preventing generation of leakage current is unnecessary, so that lower cost is realized.

摘要翻译： 用于半导体存储器件的刷新方法具有高抗噪性，较低的功耗和较低的成本。 在自刷新模式下未被选择的一个或多个存储单元块的所有字线被控制为具有基本上处于地平面的浮动电位。 即使当字线和位线短路时，该控制也可以防止可能由噪声引起的存储单元信息的破坏，并且还防止漏电流的产生。 不需要用于防止产生泄漏电流的保险丝等，从而实现较低的成本。

公开(公告)号：US20070019457A1

公开(公告)日：2007-01-25

申请号：US11452232

申请日：2006-06-14

申请人： Hajime Sato ,  Masao Shinozaki

发明人： Hajime Sato ,  Masao Shinozaki

IPC分类号： G11C5/06

CPC分类号： G11C7/18 ,  G11C7/02 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C11/4087 ,  G11C11/4093 ,  G11C11/4097

摘要： The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected to one pair of common read data lines, parasitic capacitance connected to the pair of common read data lines is reduced and, accordingly, time in which the potential difference between the pair of common read data lines increases is shortened. Thus, while preventing enlargement of the chip layout area, read time can be shortened.

摘要翻译： 本发明提供一种半导体存储器件，其中通过增加连接到一对公共写入数据线的位线对的数量来减少写入放大器的数量。 此外，通过减少连接到一对公共读取数据线的位线对的数量，减少连接到该对公共读取数据线的寄生电容，并且因此减小了该对公共读取数据之间的电位差 线条增加缩短。 因此，在防止芯片布局区域扩大的同时，可以缩短读取时间。

公开(公告)号：US07158117B2

公开(公告)日：2007-01-02

申请号：US10629621

申请日：2003-07-30

申请人： Hajime Sato ,  Yuichiro Yoshimura ,  Katsuyuki Kobayashi

发明人： Hajime Sato ,  Yuichiro Yoshimura ,  Katsuyuki Kobayashi

IPC分类号： G09G5/08

CPC分类号： G06F3/0433 ,  G06F3/0346 ,  G06F3/03545

摘要： The position coordinates of a coordinate input pen are calculated. The position coordinates are changed on the basis of, of the calculated position coordinates, predetermined coordinates related to the distance between the coordinate input surface and the coordinate input pen. The changed position coordinates are output.

摘要翻译： 计算坐标输入笔的位置坐标。 基于计算出的位置坐标来改变位置坐标，与坐标输入表面和坐标输入笔之间的距离相关的预定坐标。 输出更改的位置坐标。

公开(公告)号：US20060250176A1

公开(公告)日：2006-11-09

申请号：US11480904

申请日：2006-07-06

申请人： Hajime Sato ,  Syuichi Saito ,  Akihiro Iwase

发明人： Hajime Sato ,  Syuichi Saito ,  Akihiro Iwase

IPC分类号： G11C5/14

CPC分类号： G05F1/46 ,  G05F1/465

摘要： A voltage generator circuit which is capable of preventing the generation of a through current in a transition to a power-down mode to reduce current consumption. The voltage generator circuit includes a voltage generator activated by a reference voltage to generate an output voltage. A reference voltage clamp circuit is coupled to the voltage generator for clamping the reference voltage to a first voltage in response to a power-down signal to deactivate the voltage generator. An output voltage clamp circuit is coupled to the voltage generator for clamping the output voltage to a second voltage. A control circuit is coupled to the output voltage clamp circuit for enabling the output voltage clamp circuit after the voltage generator is deactivated in response to the power-down signal.

公开(公告)号：US06965377B2

公开(公告)日：2005-11-15

申请号：US09973838

申请日：2001-10-11

申请人： Ryozo Yanagisawa ,  Hajime Sato

发明人： Ryozo Yanagisawa ,  Hajime Sato

IPC分类号： G06F3/042 ,  G06F3/03 ,  G06F3/033 ,  G09G5/00

CPC分类号： G06F3/0317 ,  G06F3/0321

摘要： A coordinate input apparatus and a coordinate inputting method are provided, in which any influence on display images by coordinate information recorded on a coordinate plate can be extremely reduced and excellent operation of input indication is enabled without being disturbed by the coordinate information. A coordinate input apparatus includes a coordinate plate having plural pieces of coordinate information recorded thereon and a pen, or input-indicator, for indicating a desired position of the coordinate plate so as to detect coordinate information in the vicinity of the position and for indicating a position to be input. Coordinate values are determined from the coordinate information detected by the input-indicator so as to determine a coordinate value of the coordinate in the position to be input on the basis of the coordinate values and to input the coordinate value.

摘要翻译： 提供一种坐标输入装置和坐标输入方法，其中可以极大地减少对记录在坐标盘上的坐标信息对显示图像的任何影响，并且能够在不受坐标信息干扰的情况下实现良好的输入指示的操作。 坐标输入装置包括具有记录在其上的多个坐标信息的坐标板和用于指示坐标板的期望位置的笔或输入指示器，以便检测位置附近的坐标信息，并且用于指示 要输入的位置 根据由输入指示器检测到的坐标信息来确定坐标值，以便根据坐标值确定要输入的位置中坐标的坐标值并输入坐标值。

公开(公告)号：US20050157576A1

公开(公告)日：2005-07-21

申请号：US11070888

申请日：2005-03-03

申请人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

发明人： Hajime Sato ,  Yuji Nakagawa ,  Satoru Kawamoto

IPC分类号： G11C7/02 ,  G11C11/406 ,  G11C11/408 ,  G11C7/00

CPC分类号： G11C7/02 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4085 ,  G11C2211/4065 ,  G11C2211/4068

摘要： A refresh method for a semiconductor memory device features high noise resistance, lower power consumption, and lower cost. All word lines of one or more memory cell blocks that have not been selected in a self refresh mode are controlled to have a floating potential substantially at ground level. Even when a word line and a bit line are short-circuited, this control prevents destruction of memory cell information, which may be caused by noise, and also prevents generation of leakage current. A fuse, etc., for preventing generation of leakage current is unnecessary, so that lower cost is realized.

摘要翻译： 用于半导体存储器件的刷新方法具有高抗噪性，较低的功耗和较低的成本。 在自刷新模式中未被选择的一个或多个存储单元块的所有字线被控制为具有基本上处于地平面的浮动电位。 即使当字线和位线短路时，该控制也可以防止可能由噪声引起的存储单元信息的破坏，并且还防止漏电流的产生。 不需要用于防止产生泄漏电流的保险丝等，从而实现较低的成本。

公开(公告)号：US20050156589A1

公开(公告)日：2005-07-21

申请号：US11079142

申请日：2005-03-15

申请人： Seiji Yamamoto ,  Hirosuke Koumyoji ,  Tohru Yasuda ,  Mikio Ishikawa ,  Isaya Sobue ,  Hajime Sato ,  Chiaki Furukawa ,  Akira Sugiura ,  Akihiro Iwase

发明人： Seiji Yamamoto ,  Hirosuke Koumyoji ,  Tohru Yasuda ,  Mikio Ishikawa ,  Isaya Sobue ,  Hajime Sato ,  Chiaki Furukawa ,  Akira Sugiura ,  Akihiro Iwase

IPC分类号： G01R31/28 ,  G01R31/04 ,  G11C7/10 ,  H01L21/822 ,  H01L27/04 ,  G01R31/02

CPC分类号： G01R31/04 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multi-bus semiconductor device and a method of its probing test perform the DC test for individual pads of a device while dealing with an adequate number of devices for simultaneous measurement based on the scheme of input/output pad number compressive test. The semiconductor device includes switch elements SW0-SW4 connected between input/output pads P0-P4 and a testing line L0 so that pads in an arbitrary combination, among the off-probe pads P1-P4 that are not made in contact with the tester probe Pr0, are selected for testing in correspondence to the combination of switch elements that are turned on. The input/output buffers of the pads under test are deactivated to block their internal current paths. The corresponding switch elements are turned on to connect the off-probe pads under test to the probe pad P0 that is made in contact with the tester probe Pr0, and the leak current of the probes is measured with the tester TS.

摘要翻译： 多总线半导体器件及其探测测试方法基于输入/输出焊盘数压缩测试的方案，处理设备的各个焊盘的DC测试，同时处理足够数量的用于同时测量的设备。 半导体器件包括连接在输入/输出焊盘P 0 -P 4和测试线L 0之间的开关元件SW 0 -SW 4，使得不是非探针焊盘P 1 -P 4中的任意组合的焊盘 与测试仪探头Pr 0接触的选择被选择用于与打开的开关元件的组合相对应的测试。 被测试焊盘的输入/输出缓冲器被禁用以阻止其内部电流路径。 将相应的开关元件接通，将被测试的探针焊盘连接到与测试仪探头Pr 0接触的探针焊盘P 0，并用测试仪TS测量探头的漏电流。

公开(公告)号：US06239792B1

公开(公告)日：2001-05-29

申请号：US08657552

申请日：1996-06-04

申请人： Ryozo Yanagisawa ,  Atsushi Tanaka ,  Yuichiro Yoshimura ,  Katsuyuki Kobayashi ,  Masaki Tokioka ,  Hajime Sato

发明人： Ryozo Yanagisawa ,  Atsushi Tanaka ,  Yuichiro Yoshimura ,  Katsuyuki Kobayashi ,  Masaki Tokioka ,  Hajime Sato

IPC分类号： G09G500

CPC分类号： G06F3/0488

摘要： An object of the invention is to allow an editing work such as image input and image erasure to be performed easily. Specifically, according to the invention, a size of an image editing area is changed with a motion amount of input coordinates. Therefore, the size suitable for each type of editing process can be set without specific operation instructions, and the editing area having a suitable area size can be designated without interrupting a trace input operation.

摘要翻译： 本发明的目的是允许容易地执行诸如图像输入和图像擦除的编辑工作。 具体地，根据本发明，以输入坐标的运动量改变图像编辑区域的尺寸。 因此，可以在没有特定操作指令的情况下设置适合于每种类型的编辑处理的尺寸，并且可以指定具有合适区域尺寸的编辑区域而不中断跟踪输入操作。

公开(公告)号：US6136600A

公开(公告)日：2000-10-24

申请号：US92305

申请日：1998-06-05

申请人： Hajime Sato ,  Katsutoshi Yoshisato

发明人： Hajime Sato ,  Katsutoshi Yoshisato

IPC分类号： C12N1/38 ,  C07K14/475 ,  C12N5/071 ,  C12N5/00

CPC分类号： C07K14/475 ,  C12N5/067 ,  C12N2500/38 ,  C12N2501/10 ,  C12N2501/998 ,  C12N2502/13

摘要： The present invention provides a method for cultivation of hepatocytes efficiently by using a hepatocyte growth promoting factor derived from 3T3 cells, which comprises culturing hepatocytes isolated from the liver of a matured mammal in a medium containing pleiotrophin, fetal bovine serum, ascorbic acid or analogues thereof and nicotinamide or an analogue thereof, thereby forming primary colonies of the hepatocytes; and a method for subculture of the primary hepatocytes in the same medium.

摘要翻译： 本发明提供一种通过使用来自3T3细胞的肝细胞生长促进因子有效培养肝细胞的方法，其包括在含有多余营养素，胎牛血清，抗坏血酸或其类似物的培养基中培养从成熟哺乳动物的肝脏分离的肝细胞 和烟酰胺或其类似物，从而形成肝细胞的原始集落; 以及在同一培养基中继代培养原代肝细胞的方法。