SCALED NANOTUBE ELECTRODE FOR LOW POWER MULTISTAGE ATOMIC SWITCH

    公开(公告)号:US20190319184A1

    公开(公告)日:2019-10-17

    申请号:US15950754

    申请日:2018-04-11

    IPC分类号: H01L45/00

    摘要: A method of forming a memory device that includes depositing a first dielectric material within a trench of composed of a second dielectric material; positioning a nanotube within the trench using chemical recognition to the first dielectric material; depositing a dielectric for cation transportation within the trench on the nanotube; and forming a second electrode on the dielectric for cation transportation, wherein the second electrode is composed of a metal.

    PHOTODETECTOR HAVING A TUNABLE JUNCTION REGION DOPING PROFILE CONFIGURED TO IMPROVE CONTACT RESISTANCE PERFORMANCE

    公开(公告)号:US20190214521A1

    公开(公告)日:2019-07-11

    申请号:US15867121

    申请日:2018-01-10

    摘要: Embodiments of the invention are directed to a method of forming a semiconductor device. A non-limiting example of the method includes forming a semiconductor material that includes a first type of majority carrier. A doping enhancement layer is formed over a region of the semiconductor material, wherein the doping enhancement layer includes a first type of material. A dopant is accelerated sufficiently to drive the dopant through the doping enhancement layer into the region of the semiconductor material. Accelerating the dopant through the doping enhancement layer also drives some of the first type of material from the doping enhancement layer into the region of the semiconductor material. The dopant within the region and the first type of material within the region contribute to the region having a second type of majority carrier.