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公开(公告)号:US11923267B2
公开(公告)日:2024-03-05
申请号:US16831076
申请日:2020-03-26
Applicant: Intel Corporation
Inventor: Debendra Mallik , Je-Young Chang , Ram Viswanath , Elah Bozorg-Grayeli , Ahmad Al Mohammad
IPC: H01L23/367 , H01L23/373 , H01L23/495
CPC classification number: H01L23/3672 , H01L23/373 , H01L23/49568
Abstract: Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder alloy. Metallization on the IC die and/or heat spreader may comprise a plurality of solderable structures. A multi-chip package may include multiple IC die having different die thickness that are accommodated by a z-height thickness variation in the thermal interconnects and/or the solderable structures of the IC die or heat spreader.
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公开(公告)号:US11710672B2
公开(公告)日:2023-07-25
申请号:US16504734
申请日:2019-07-08
Applicant: Intel Corporation
Inventor: Taylor William Gaines , Ken Hackenberg , Frederick W. Atadana , Elah Bozorg-Grayeli
IPC: H01L23/10 , H01L23/367 , H01L23/373 , H01L21/50 , H01L21/56 , H01L23/42
CPC classification number: H01L23/10 , H01L21/50 , H01L21/563 , H01L23/367 , H01L23/3736 , H01L23/42 , H01L2924/16152
Abstract: Embodiments may relate to a method of forming a microelectronic package with an integrated heat spreader (IHS). The method may include placing a solder thermal interface material (STIM) layer on a face of a die that is coupled with a package substrate; coupling the IHS with the STIM layer and the package substrate such that the STIM is between the IHS and the die; performing formic acid fluxing of the IHS, STIM layer, and die; and dispensing, subsequent to the formic acid fluxing, sealant on the package substrate around a periphery of the IHS.
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23.
公开(公告)号:US20210265238A1
公开(公告)日:2021-08-26
申请号:US16798118
申请日:2020-02-21
Applicant: INTEL CORPORATION
IPC: H01L23/373 , H01L23/367 , H01L23/42 , H01L21/48 , C09K5/14 , C08K3/04
Abstract: Microelectronic devices, assemblies, and systems include a microelectronic die and composite material to conduct heat from the microelectronic die such that the composite material includes polymer chains chemically bonded to fill particles having a hexagonal lattice of carbon atoms such as graphene sheet fill particles and/or carbon nanotube fill particles.
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24.
公开(公告)号:US20210225729A1
公开(公告)日:2021-07-22
申请号:US16746732
申请日:2020-01-17
Applicant: Intel Corporation
Inventor: Elah Bozorg-Grayeli , Kyle Arrington , Sergio Chan Arguedas , Aravindha Antoniswamy
IPC: H01L23/373 , H01L23/16 , H01L23/367 , H01L23/00 , H01L21/48
Abstract: A second-level thermal interface material (TIM2) that is to couple to a system-level thermal solution is applied to an integrated circuit (IC) assembly comprising an IC die and an assembly substrate prior to the assembly substrate being joined to a host component at the system-level. Challenges associated with TIM2 application may therefore be addressed at a first level of IC die integration, simplifying subsequent assembly and better controlling thermal coupling to a subsequently applied thermal solution. Where a first-level IC assembly includes a stiffener, the TIM may be affixed to the stiffener through an adhesive bond or a fusion bond. After the IC assembly including the TIM is soldered to the host board, a thermal solution may be placed in contact with the TIM. With early application of a solder TIM, a solder TIM may be reflowed upon the IC die multiple times.
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公开(公告)号:US10569298B2
公开(公告)日:2020-02-25
申请号:US15717582
申请日:2017-09-27
Applicant: Intel Corporation
Inventor: Michael Greenley , Elah Bozorg-Grayeli
IPC: B05D3/06 , C09J163/00 , C09J5/04 , G02B7/02 , C09D163/00 , C08G59/18
Abstract: Embodiments herein relate to curing of an epoxy using an ultraviolet (UV) laser. A volume of epoxy may be coupled to an area of a surface, and the volume of epoxy is cured and surrounded by material other than cured epoxy, where the area of the surface is substantially equal to a diameter of the UV laser beam used to cure the epoxy. Other embodiments may be described and/or claimed.
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公开(公告)号:US10475715B2
公开(公告)日:2019-11-12
申请号:US15037851
申请日:2015-06-17
Applicant: Intel Corporation
Inventor: Venmathy McMahan , Sivakumar Nagarajan , Elah Bozorg-Grayeli , Amrita Mallik , Kuang-Han Chu , Liwei Wang , Nisha Ananthakrishnan , Craig J. Weinman , Amram Eitan
IPC: H01L23/29 , H01L23/31 , H01L23/48 , H01L21/56 , H01L23/18 , H01L23/373 , H01L25/065 , H01L25/07 , H01L23/00
Abstract: Some embodiments relate to an electronic package. The electronic package includes a first die and a second die stacked onto the first die. A first encapsulant is positioned between the first die and the second die. The first encapsulant includes a first material that covers a first volume between the first die and the second die. A second encapsulant is positioned between the first die and the second die. The second encapsulant includes a second material that covers a second volume between the first die and the second die. The first material has a higher thermal conductivity than the second material, and the second material more effectively promotes electrical connections between the first die and the second die as compared to the first material.
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