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    Resistive switching schmitt triggers and comparators
    22.
    发明授权
    Resistive switching schmitt triggers and comparators 有权
    电阻式开关施密特触发器和比较器

    公开(公告)号：US09000819B1

    公开(公告)日：2015-04-07

    申请号：US14133117

    申请日：2013-12-18

    Applicant: Intermolecular Inc.

    Inventor： Federico Nardi ,  Yun Wang

    IPC: H03K3/00 ,  H03K3/0233

    CPC classification number: H03K3/02335 ,  H03K3/02337

    Abstract: A resistive switching element can be used in a nonvolatile digital Schmitt trigger circuit or a comparator circuit. The Schmitt trigger circuit can include a resistive switching circuit, and a reset circuit. The resistive switching circuit can provide a hysteresis behavior suitable for Schmitt trigger operation. The reset circuit can be operable to reset the resistive switching circuit to a high resistance state. The comparator circuit can include a resistive switching circuit, a reset circuit, and a threshold setting circuit. The resistive switching circuit can include a resistive switching element, and can be operable to provide a signal comparing an input voltage with the set or reset threshold voltage of the resistive switching element. The threshold setting circuit can be operable to modify the set or reset threshold of the resistive switching element, effectively changing the reference voltage for the comparator circuit.

    Abstract translation: 电阻式开关元件可用于非易失性数字施密特触发电路或比较器电路。 施密特触发电路可以包括电阻开关电路和复位电路。 电阻开关电路可以提供适用于施密特触发器操作的滞后特性。 复位电路可以用于将电阻式开关电路复位到高电阻状态。 比较器电路可以包括电阻开关电路，复位电路和阈值设置电路。 电阻式开关电路可以包括电阻开关元件，并且可操作以提供将输入电压与电阻式开关元件的置位或复位阈值电压进行比较的信号。 阈值设置电路可以用于修改电阻性开关元件的置位或复位阈值，从而有效地改变比较器电路的参考电压。

    Morphology control of ultra-thin MeOx layer
    23.
    发明申请
    Morphology control of ultra-thin MeOx layer 有权
    超薄MeOx层的形态控制

    公开(公告)号：US20140175357A1

    公开(公告)日：2014-06-26

    申请号：US13724126

    申请日：2012-12-21

    Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

    Inventor： Federico Nardi ,  Yun Wang

    IPC: H01L45/00

    CPC classification number: H01L45/06 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1616 ,  H01L51/0098

    Abstract: A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.

    Abstract translation: 非易失性存储器件包含具有改进的器件切换性能和寿命的电阻式开关存储器元件及其形成方法。 非易失性存储器件在衬底上具有第一层，在第一层上具有电阻性开关层，以及第二层。 电阻开关层设置在第一层和第二层之间，电阻开关层包括与第一层的顶表面相同形态的材料。 在ReRAM器件中形成非易失性存储元件的方法包括在第一层上形成电阻式开关层并形成第二层，使得电阻式开关层位于第一层和第二层之间。 电阻开关层包括与第一层的顶表面形成相同形态的材料。

    IL-Free MIM stack for clean RRAM Devices
    24.
    发明申请
    IL-Free MIM stack for clean RRAM Devices 有权
    用于清洁RRAM设备的无IL-MIM MIM堆栈

    公开(公告)号：US20140166960A1

    公开(公告)日：2014-06-19

    申请号：US13714106

    申请日：2012-12-13

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Federico Nardi ,  Yun Wang

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/16 ,  H01L45/1608

    Abstract: A nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, and methods of forming the same. A nonvolatile memory element includes a first electrode layer formed on a substrate, a resistive switching layer formed on the first electrode layer, and a second electrode layer. The resistive switching layer comprises a metal oxide and is disposed between the first electrode layer and the second electrode layer. The elemental metal selected for each of the first and second electrode layers is the same metal as selected to form the metal oxide resistive switching layer. The use of common metal materials within the memory element eliminates the growth of unwanted and incompatible native oxide interfacial layers that create undesirable circuit impedance.

    Abstract translation: 一种非易失性存储器件，其包含具有改进的器件切换性能和寿命的电阻式开关存储元件及其形成方法。 非易失性存储元件包括形成在基板上的第一电极层，形成在第一电极层上的电阻开关层和第二电极层。 电阻开关层包括金属氧化物，并且设置在第一电极层和第二电极层之间。 为第一和第二电极层中的每一个选择的元素金属与所选择的金属相同，以形成金属氧化物电阻式开关层。 在记忆元件内部使用普通金属材料消除了不希望的和不相容的天然氧化物界面层的生长，产生不希望的电路阻抗。

    Current Selectors Formed Using Single Stack Structures
    27.
    发明申请
    Current Selectors Formed Using Single Stack Structures 有权
    使用单堆栈结构形成的当前选择器

    公开(公告)号：US20170062524A1

    公开(公告)日：2017-03-02

    申请号：US15225980

    申请日：2016-08-02

    Applicant: Intermolecular, Inc.

    Inventor： Federico Nardi ,  Mark Clark

    IPC: H01L27/24 ,  H01L23/528 ,  H01L27/11 ,  H01L29/45 ,  H01L29/861 ,  H01L27/108

    CPC classification number: H01L45/122 ,  H01L23/528 ,  H01L27/10805 ,  H01L27/11 ,  H01L27/2409 ,  H01L27/2418 ,  H01L29/45 ,  H01L29/861 ,  H01L45/00 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/1253 ,  H01L45/143

    Abstract: Provided are hybrid electrodes comprising base structures and plugs disposed within the base structures. Also provided are selector elements comprising such hybrid electrodes and memory arrays with selector elements used for addressing individual memory cells. Specifically, the base structure and plug of a hybrid electrode have different compositions but both interface the same dielectric of the selector element. This design allows anti-parallel diode and other configurations with a very few components. The base structure and plug may have different dopants, different stoichiometry of the same alloy, or formed from completely different materials. The interfacing surface portions of a hybrid electrode may have different sizes. A combination of these surface portions (e.g., areas, surface conditions) and materials (e.g., compositions) can be used for tuning operating characteristics of selector elements using such hybrid electrodes.

    Abstract translation: 提供了包括设置在基部结构内的基部结构和插塞的混合电极。 还提供了包括这种混合电极的选择器元件和具有用于寻址各个存储器单元的选择器元件的存储器阵列。 具体地说，混合电极的基底结构和插头具有不同的组成，但是两者都与选择器元件的相同电介质接触。 这种设计允许反并联二极管和其他配置的组件很少。 基础结构和塞子可以具有不同的掺杂剂，相同合金的不同化学计量或由完全不同的材料形成。 混合电极的接合表面部分可以具有不同的尺寸。 可以使用这些表面部分（例如，区域，表面条件）和材料（例如组合物）的组合来调整使用这种混合电极的选择器元件的操作特性。

    Two Stage Forming of Resistive Random Access Memory Cells
    28.
    发明申请
    Two Stage Forming of Resistive Random Access Memory Cells 有权
    电阻随机存取存储单元的两阶段形成

    公开(公告)号：US20160149130A1

    公开(公告)日：2016-05-26

    申请号：US14552034

    申请日：2014-11-24

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Federico Nardi

    IPC: H01L45/00 ,  G11C13/00

    CPC classification number: G11C13/0069 ,  G11C13/0007 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/33 ,  G11C2213/34 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/77 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145

    Abstract: Provided are memory cells, such as resistive random access memory (ReRAM) cells, each cell having multiple metal oxide layers formed from different oxides, and methods of manipulating and fabricating these cells. Two metal oxides used in the same cell have different dielectric constants, such as silicon oxide and hafnium oxide. The memory cell may include electrodes having different metals. Diffusivity of these metals into interfacing metal oxide layers may be different. Specifically, the lower-k oxide may be less prone to diffusion of the metal from the interfacing electrode than the higher-k oxide. The memory cell may be formed to different stable resistive levels and then resistively switched at these levels. Each level may use a different switching power. The switching level may be selected a user after fabrication of the cell and in, some embodiments, may be changed, for example, after switching the cell at a particular level.

    Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的存储器单元，每个单元具有由不同氧化物形成的多个金属氧化物层，以及操纵和制造这些单元的方法。 在同一电池中使用的两种金属氧化物具有不同的介电常数，例如氧化硅和氧化铪。 存储单元可以包括具有不同金属的电极。 这些金属在界面金属氧化物层中的扩散性可能是不同的。 具体而言，低K氧化物可能比较高K氧化物更不易于从界面电极扩散金属。 可以将存储单元形成为不同的稳定电阻水平，然后在这些电平下进行电阻切换。 每个级别可能使用不同的开关电源。 可以在单元的制造之后选择用户的切换级别，并且在一些实施例中，可以例如在将单元切换到特定级别之后进行改变。

    Current-limiting electrodes
    29.
    发明授权
    Current-limiting electrodes 有权
    限流电极

    公开(公告)号：US09224951B1

    公开(公告)日：2015-12-29

    申请号：US14336652

    申请日：2014-07-21

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Federico Nardi ,  Milind Weling

    IPC: H01L27/24 ,  H01L45/00

    CPC classification number: H01L45/145 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/1608 ,  H01L45/1625 ,  H01L45/1641

    Abstract: A resistive-switching memory (ReRAM cell) has a current-limiting electrode layer that combines the functions of an embedded resistor, an outer electrode, and an intermediate electrode, reducing the thickness of the ReRAM stack and simplifying the fabrication process. The materials include compound nitrides of a transition metal and one of aluminum, boron, or silicon. In experiments with tantalum silicon nitride, peak yield in the desired resistivity range corresponded to ˜24 at % silicon and ˜32 at % nitrogen, believed to optimize the trade-off between inhibiting TaSi2 formation and minimizing nitrogen diffusion. A binary metal nitride may be formed at one or more of the interfaces between the current-limiting electrode and neighboring layers such as metal-oxide switching layers.

    Abstract translation: 电阻式开关存储器（ReRAM单元）具有限流电极层，其结合了嵌入式电阻器，外部电极和中间电极的功能，减小了ReRAM堆叠的厚度并简化了制造工艺。 这些材料包括过渡金属和铝，硼或硅之一的化合物氮化物。 在使用钽氮化硅的实验中，所需电阻率范围内的峰值产率对应于〜24at％的硅和〜32at％的氮，据信可以优化抑制TaSi2形成和最小化氮扩散之间的折衷。 二元金属氮化物可以形成在限流电极和相邻层之间的界面中的一个或多个处，例如金属氧化物开关层。

    Morphology control of ultra-thin MeOx layer
    30.
    发明授权
    Morphology control of ultra-thin MeOx layer 有权
    超薄MeOx层的形态控制

    公开(公告)号：US09178140B2

    公开(公告)日：2015-11-03

    申请号：US14624209

    申请日：2015-02-17

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Federico Nardi ,  Yun Wang

    IPC: H01L29/02 ,  H01L45/00 ,  H01L51/00 ,  H01L27/24

    CPC classification number: H01L45/06 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1616 ,  H01L51/0098

    Abstract: A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.

    Abstract translation: 非易失性存储器件包含具有改进的器件切换性能和寿命的电阻式开关存储器元件及其形成方法。 非易失性存储器件在衬底上具有第一层，在第一层上具有电阻性开关层，以及第二层。 电阻开关层设置在第一层和第二层之间，电阻开关层包括与第一层的顶表面相同形态的材料。 在ReRAM器件中形成非易失性存储元件的方法包括在第一层上形成电阻式开关层并形成第二层，使得电阻式开关层位于第一层和第二层之间。 电阻开关层包括与第一层的顶表面形成相同形态的材料。

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