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公开(公告)号:US12189253B2
公开(公告)日:2025-01-07
申请号:US18673809
申请日:2024-05-24
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Takuo Kaitoh , Ryo Onodera , Motochika Yukawa
IPC: G02F1/1339 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368
Abstract: A display device includes a first conductive layer arranged on a first substrate and extending in a first direction, a first insulating film arranged on the first conductive layer, a second conductive layer arranged on the first insulating film and extending in a second direction intersecting the first direction, a second insulating film arranged on the second conductive layer and extending in the first direction and the second direction, a transparent conductive layer arranged on the second insulating film and extending in the first direction and the second direction, a third insulating film arranged on the first conductive layer, and a second substrate opposing the first substrate.
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公开(公告)号:US12158661B2
公开(公告)日:2024-12-03
申请号:US18502178
申请日:2023-11-06
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Takuo Kaitoh , Ryo Onodera , Tomoyuki Ito , Yoshinori Tanaka
IPC: G02F1/13357 , G02F1/1334 , H01L27/12
Abstract: A display device includes a first nitride insulating film arranged on a first substrate, a gate electrode arranged along a first direction on the first nitride insulating film, a second nitride insulating film arranged on the gate electrode, a first oxide insulating film arranged on the second nitride insulating film, and an oxide semiconductor layer arranged on the first oxide insulating film, wherein the gate electrode has a first titanium layer, an aluminum layer, and a second titanium layer stacked in order from the first nitride insulating film side, and a thickness of the second titanium layer is greater than a thickness of the first titanium layer.
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公开(公告)号:US12154989B2
公开(公告)日:2024-11-26
申请号:US17523054
申请日:2021-11-10
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Takuo Kaitoh
IPC: H01L29/786
Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and n (n is a natural number) metal layer(s) in contact with the oxide semiconductor layer and disposed across the oxide semiconductor layer between the source electrode and the drain electrode. The oxide semiconductor layer has (n+1) channel regions between the source electrode and the drain electrode in a plan view.
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公开(公告)号:US12108627B2
公开(公告)日:2024-10-01
申请号:US17533127
申请日:2021-11-23
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Kentaro Miura , Hajime Watakabe , Ryo Onodera
IPC: H01L27/32 , H01L51/56 , H10K59/121 , H10K59/126 , H10K71/00 , H01L27/12 , H01L29/786 , H10K59/12 , H10K59/123
CPC classification number: H10K59/1213 , H10K59/126 , H10K71/00 , H01L27/1225 , H01L27/1251 , H01L29/78618 , H01L29/78633 , H01L29/78675 , H01L29/7869 , H10K59/1201 , H10K59/123
Abstract: A display device includes a first transistor having a first semiconductor layer, in which a first source region includes a first region in contact with a first source electrode, and a first drain region includes a second region in contact with a first drain electrode. The first source and drain regions, the first region, and the second region each include a first impurity element. In a region close to an interface between the first semiconductor layer and a first insulating layer, a concentration of the first impurity element included in the first and second regions is higher than a concentration of the first impurity element included in the first source region and the first drain region. A method of manufacturing a display device includes forming a first gate electrode and a light shielding layer on a first insulating layer, and forming a second semiconductor layer on the light shielding layer.
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公开(公告)号:US12068399B2
公开(公告)日:2024-08-20
申请号:US17511633
申请日:2021-10-27
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Takuo Kaitoh , Ryo Onodera , Takashi Okada , Tomoyuki Ito , Toshiki Kaneko
IPC: H01L29/66 , H01L21/385 , H01L27/12 , H01L29/786
CPC classification number: H01L29/66969 , H01L21/385 , H01L27/1225 , H01L29/7869
Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.
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公开(公告)号:US12025899B2
公开(公告)日:2024-07-02
申请号:US18349217
申请日:2023-07-10
Applicant: Japan Display Inc.
Inventor: Tatsunori Muramoto , Kentaro Kawai , Yoshihide Ohue , Akihiro Hanada
IPC: G02F1/1368 , G02F1/1334 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/1334 , G02F1/136286 , H01L27/1248
Abstract: According to one embodiment, a display device includes a first substrate including a first transparent substrate, a switching element including an oxide semiconductor, an organic insulating film covering the switching element, a transparent electrode including a first aperture penetrating to an upper surface of the organic insulating film, an inorganic insulating film including a second aperture penetrating to the upper surface in the first aperture, and a pixel electrode electrically connected to the switching element, and a second substrate including a second transparent substrate and opposed to the first substrate.
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公开(公告)号:US11942484B2
公开(公告)日:2024-03-26
申请号:US17876063
申请日:2022-07-28
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Hajime Watakabe , Kazufumi Watabe
IPC: H01L27/12 , G06F1/26 , H02J13/00 , H04L41/069 , H04L47/2416 , H04L67/12 , H01L29/423 , H01L29/51 , H01L29/786 , H04Q9/02
CPC classification number: H01L27/1225 , G06F1/26 , H01L27/1237 , H01L27/1248 , H01L27/1251 , H02J13/00 , H02J13/00016 , H04L41/069 , H04L47/2416 , H04L67/12 , H01L29/42384 , H01L2029/42388 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78606 , H01L29/78633 , H01L29/78675 , H01L29/7869 , H04Q9/02 , H04Q2209/826
Abstract: A semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.
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公开(公告)号:US11855117B2
公开(公告)日:2023-12-26
申请号:US17167081
申请日:2021-02-04
Applicant: Japan Display Inc.
Inventor: Hajime Watakabe , Akihiro Hanada , Marina Mochizuki , Ryo Onodera , Fumiya Kimura , Isao Suzumura
IPC: H01L27/146
CPC classification number: H01L27/14643 , H01L27/1461 , H01L27/14636 , H01L27/14689
Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.
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公开(公告)号:US11824063B2
公开(公告)日:2023-11-21
申请号:US17148653
申请日:2021-01-14
Applicant: Japan Display Inc.
Inventor: Akihiro Hanada , Toshihide Jinnai
IPC: H01L27/12 , H01L29/66 , H01L29/786
CPC classification number: H01L27/1229 , H01L27/1225 , H01L29/66969 , H01L29/7869
Abstract: An object of the present invention is to provide a technology using which, in a thin film transistor using oxide semiconductor, the resistance of a channel region of the oxide semiconductor is made high, and at the same time the resistances of a source region and a drain region of the oxide semiconductor are made low. There is provided a semiconductor device including: a thin film transistor including oxide semiconductor, the oxide semiconductor including a channel region, a drain region, and a source region; a gate insulating film formed on the channel region; an aluminum oxide film formed on the gate insulating film; and a gate electrode formed on the aluminum oxide film, wherein the aluminum oxide film has a region that covers neither the drain region nor the source region in a plane view.
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公开(公告)号:US11550195B2
公开(公告)日:2023-01-10
申请号:US17506694
申请日:2021-10-21
Applicant: Japan Display Inc.
Inventor: Toshihide Jinnai , Hajime Watakabe , Akihiro Hanada , Ryo Onodera , Isao Suzumura
IPC: G02F1/1362 , G02F1/1368 , H01L29/786 , H01L27/12 , H01L27/32
Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
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