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    SOLAR CELL
    24.
    发明申请
    SOLAR CELL 审中-公开
    太阳能电池

    公开(公告)号：US20110048529A1

    公开(公告)日：2011-03-03

    申请号：US12828588

    申请日：2010-07-01

    Applicant: Doo-Youl Lee ,  Dong-Seop Kim ,  Jin-Wook Lee ,  Hwa-Young Ko

    Inventor： Doo-Youl Lee ,  Dong-Seop Kim ,  Jin-Wook Lee ,  Hwa-Young Ko

    IPC: H01L31/0236 ,  H01L31/0256

    CPC classification number: H01L31/068 ,  H01L31/02245 ,  Y02E10/547

    Abstract: A solar cell includes a semiconductor substrate having a plurality of contact holes penetrating therethrough, from one surface to the opposing surface and including a part having a first conductive layer selected from p-type and n-type and a part having a second conductive layer different from the first conductive layer and selected from p-type and n-type semiconductor, a first electrode formed on one surface of the semiconductor substrate and electrically connected with the part having the first conductive layer, a second electrode formed on the other surface of the semiconductor substrate and electrically connected with the first electrode, and a third electrode formed on the same surface as in the second electrode and electrically connected with the part having the second conductive layer of the semiconductor substrate, wherein the plurality of contact holes form a contact hole group, and the first electrode and the second electrode are connected through one or more of the plurality of contact holes of the contact hole group.

    Abstract translation: 太阳能电池包括从一个表面到相对的表面具有穿过其的多个接触孔的半导体衬底，并且包括具有选自p型和n型的第一导电层的部分和具有不同的第二导电层的部分 从所述第一导电层中选择p型和n型半导体，形成在所述半导体衬底的一个表面上并与具有所述第一导电层的部分电连接的第一电极，形成在所述第一导电层的另一个表面上的第二电极 半导体衬底并与第一电极电连接;以及第三电极，其形成在与第二电极相同的表面上并与具有半导体衬底的第二导电层的部分电连接，其中多个接触孔形成接触孔 并且第一电极和第二电极通过多个中的一个或多个连接 的接触孔组的接触孔。

    OPERATION METHOD AND SYSTEM OF MOBILE TERMINAL
    25.
    发明申请
    OPERATION METHOD AND SYSTEM OF MOBILE TERMINAL 有权
    移动终端的操作方法和系统

    公开(公告)号：US20100210293A1

    公开(公告)日：2010-08-19

    申请号：US12706591

    申请日：2010-02-16

    Applicant: Hun LIM ,  Gene-Moo Lee ,  Jin-Wook Lee ,  Je-Hyok Ryu ,  Woo-Jin Park ,  Jin-Hyoung Kim ,  Shin-Il Kang

    Inventor： Hun LIM ,  Gene-Moo Lee ,  Jin-Wook Lee ,  Je-Hyok Ryu ,  Woo-Jin Park ,  Jin-Hyoung Kim ,  Shin-Il Kang

    IPC: H04W4/20

    CPC classification number: H04M1/72527 ,  H04M1/274516 ,  H04M1/7253 ,  H04M1/72552 ,  H04W88/02

    Abstract: An operation method and system of a mobile terminal connected to an electronic device is provided. The electronic device extracts a content corresponding to a user selection from among contents displayed on a screen, and delivers to the mobile terminal the extracted content and functional application information and command of a mobile terminal that will execute the extracted content. The mobile terminal receives the extracted content and the functional application information and command, and executes the functional application according to the command using the extracted content.

    Abstract translation: 提供了连接到电子设备的移动终端的操作方法和系统。 电子设备从屏幕上显示的内容中提取与用户选择相对应的内容，并且向移动终端传送提取的内容和将执行提取的内容的移动终端的功能应用信息和命令。 移动终端接收提取的内容和功能应用信息和命令，并且使用提取的内容根据命令来执行功能应用。

    INKJET PRTINTHEAD AND METHOD OF MANUFACTURING THE SAME
    26.
    发明申请
    INKJET PRTINTHEAD AND METHOD OF MANUFACTURING THE SAME 有权
    INKJET PRINTHEAD及其制造方法

    公开(公告)号：US20100165044A1

    公开(公告)日：2010-07-01

    申请号：US12575087

    申请日：2009-10-07

    Applicant: Sung-Joon PARK ,  Myong-Jong Kwon ,  Jin-Wook Lee ,  Young-Ung Ha

    Inventor： Sung-Joon PARK ,  Myong-Jong Kwon ,  Jin-Wook Lee ,  Young-Ung Ha

    IPC: B41J2/145 ,  B21D53/76

    CPC classification number: B41J2/14129 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1645 ,  B41J2/1646 ,  Y10T29/49401

    Abstract: Provided are an inkjet printhead and a method of manufacturing the same. The inkjet printhead includes: a substrate including an ink feed hole; a chamber layer formed on the substrate and including a plurality of ink chambers in which ink supplied from the ink feed hole may be filled; and a nozzle layer formed on the chamber layer and including a plurality of nozzles through which ink may be ejected, wherein the chamber layer and the nozzle layer are respectively formed of cured products of a first negative photoresist composition and a second negative photoresist composition, wherein the first negative photoresist composition and the second negative photoresist composition include a bisphenol-A novolac epoxy resin represented by Formula 1; at least one epoxy resin selected from a first epoxy resin represented by Formula 2, and a second epoxy resin represented by Formula 3; a cationic photoinitiator; and a solvent.

    Abstract translation: 提供一种喷墨打印头及其制造方法。 喷墨打印头包括：包括供墨孔的基板; 形成在所述基板上并且包括可以填充从所述供墨孔供应的墨的多个墨室的腔室层; 以及喷嘴层，其形成在所述室层上并且包括可以喷射墨的多个喷嘴，其中所述室层和所述喷嘴层分别由第一负性光致抗蚀剂组合物和第二负性光致抗蚀剂组合物的固化产物形成，其中 第一负性光致抗蚀剂组合物和第二负性光致抗蚀剂组合物包含由式1表示的双酚A酚醛清漆环氧树脂; 至少一种选自由式2表示的第一环氧树脂的环氧树脂和由式3表示的第二环氧树脂; 阳离子光引发剂; 和溶剂。

    Method and apparatus for controlling slope of word line voltage in nonvolatile memory device
    27.
    发明授权
    Method and apparatus for controlling slope of word line voltage in nonvolatile memory device 有权
    用于控制非易失性存储器件中字线电压斜率的方法和装置

    公开(公告)号：US07372754B2

    公开(公告)日：2008-05-13

    申请号：US11354917

    申请日：2006-02-16

    Applicant: Sang-Won Hwang ,  Jin-Wook Lee

    Inventor： Sang-Won Hwang ,  Jin-Wook Lee

    IPC: G11C7/00

    CPC classification number: G11C16/12 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/30 ,  G11C16/32

    Abstract: A nonvolatile memory device includes a nonvolatile memory cell array including a plurality of nonvolatile memory cells connected to a plurality of word lines, a word line voltage generator configured to generate first and second sequences of voltage pulses. The device selectively supplies one of the first and second sequences of voltage pulses to a selected one of the word lines to program the nonvolatile memory cells connected to the selected word line. A slope of at least one voltage pulse of the first sequence of voltage pulses is greater than a slope of at least one voltage pulse of the second sequence of voltage pulses. In general, the first sequence is applied to word lines far away from the string select line (SSL), and the second sequence is applied to word lines that are close to the SSL.

    Abstract translation: 非易失性存储器件包括非易失性存储单元阵列，包括连接到多个字线的多个非易失性存储器单元，字线电压发生器，被配置为产生第一和第二电压脉冲序列。 该装置选择性地将第一和第二电压脉冲序列中的一个提供给选定的字线之一，以编程连接到所选字线的非易失存储器单元。 电压脉冲的第一序列的至少一个电压脉冲的斜率大于第二电压脉冲序列的至少一个电压脉冲的斜率。 通常，第一个序列应用于远离字符串选择行（SSL）的字线，第二个序列应用于接近SSL的字线。

    Erase discharge method of memory device and discharge circuit performing the method
    28.
    发明授权
    Erase discharge method of memory device and discharge circuit performing the method 有权
    擦除执行该方法的存储器件和放电电路的放电方法

    公开(公告)号：US07369442B2

    公开(公告)日：2008-05-06

    申请号：US11303557

    申请日：2005-12-15

    Applicant: Jin-Wook Lee ,  Jin-Yub Lee

    Inventor： Jin-Wook Lee ,  Jin-Yub Lee

    IPC: G11C11/03

    CPC classification number: G11C16/14

    Abstract: A method for discharging an erase voltage of a semiconductor memory device and discharge circuit for performing the method, the method including performing a first discharge on a common source line (CSL) of the semiconductor memory device, comparing the detected CSL voltage with a predetermined reference voltage, and performing a second discharge on the CSL when the detected CSL voltage is lower than a predetermined reference voltage.

    Abstract translation: 一种用于对用于执行该方法的半导体存储器件和放电电路的擦除电压进行放电的方法，该方法包括在半导体存储器件的公共源极线（CSL）上执行第一次放电，将检测到的CSL电压与预定的参考值进行比较 电压，并且当检测到的CSL电压低于预定参考电压时，在CSL上执行第二放电。

    Flash memory device capable of improving reliability
    30.
    发明申请
    Flash memory device capable of improving reliability 有权
    能够提高可靠性的闪存装置

    公开(公告)号：US20070091694A1

    公开(公告)日：2007-04-26

    申请号：US11454481

    申请日：2006-06-16

    Applicant: Jin-Wook Lee ,  Jin-Yub Lee

    Inventor： Jin-Wook Lee ,  Jin-Yub Lee

    IPC: G11C5/14

    CPC classification number: G11C16/3418 ,  G11C16/26 ,  G11C16/3427

    Abstract: A flash memory device includes a memory cell array having a first region and a second region that include memory cells arranged in a plurality of rows and columns; an address storage circuit adapted to store address information for defining the second region; a row decoder circuit adapted to select one of the first and second regions in response to an external address; a voltage generating circuit adapted to generate a read voltage to be provided to a row of the selected region by the row decoder circuit during a read operation; a detecting circuit adapted to detect whether the selected region is included in the second region on the basis of address information and external address information that are stored in the address storage circuit; and a control logic adapted to control the voltage generating circuit in response to an output of the detecting circuit during the read operation. The control logic controls the voltage generating circuit so that a read voltage provided to the row of the second region is lower than a read voltage provided to a row of the first region.

    Abstract translation: 闪速存储器件包括具有第一区域和第二区域的存储单元阵列，所述第二区域包括排列成多行和列的存储单元; 地址存储电路，适于存储用于定义第二区域的地址信息; 行解码器电路，其适于响应于外部地址来选择所述第一和第二区域中的一个; 电压发生电路，其适于在读取操作期间由行解码器电路产生要提供给所选区域的行的读取电压; 检测电路，其适于基于存储在所述地址存储电路中的地址信息和外部地址信息来检测所述选择区域是否包括在所述第二区域中; 以及控制逻辑，适于在读取操作期间响应于检测电路的输出来控制电压产生电路。 控制逻辑控制电压产生电路，使得提供给第二区域的行的读取电压低于提供给第一区域的行的读取电压。

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