Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures
    21.
    发明授权
    Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures 有权
    寻找扫描探针(SSP)存储器,在CMOS兼容温度下形成尖锐的探针尖

    公开(公告)号:US08681596B2

    公开(公告)日:2014-03-25

    申请号:US12961848

    申请日:2010-12-07

    申请人: John Heck

    发明人: John Heck

    摘要: Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip. Embodiments of an apparatus comprising a conductive metal oxide semiconductor (CMOS) wafer including circuitry therein; one or more micro-electro-mechanical (MEMS) probes integrally formed on the CMOS wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and a sharpened tip at or near the free end, the sharpened tip formed by a process comprising forming an unsharpened tip at or near the free end of each cantilever beam, depositing a silicide-forming material over the unsharpened tip, annealing the wafer to sharpen the unsharpened tip, and exposing the sharpened tip.

    摘要翻译: 一种方法的实施例包括在导电金属氧化物半导体(CMOS)晶片上形成一个或多个微电机械(MEMS)探针,其中每个MEMS探针包括具有固定端和自由端的悬臂梁,并且其中所述CMOS晶片 在其上有电路; 在每个悬臂梁的自由端处或附近形成未钝化的尖端; 在尖端上沉积硅化物形成材料; 退火晶片以锐化尖端; 并暴露锋利的尖端。 包括其中包括电路的导电金属氧化物半导体(CMOS)晶片的装置的实施例; 在CMOS晶片上整体形成的一个或多个微机电(MEMS)探针,其中每个MEMS探针包括具有固定端和自由端的悬臂梁,以及在自由端处或附近的尖锐尖端,形成尖锐的尖端 通过包括在每个悬臂梁的自由端处或附近形成未钝化的尖端的方法,在未钝化的尖端上沉积硅化物形成材料,退火晶片以锐化未钝化的尖端,以及暴露尖锐的尖端。

    Hybrid III-V silicon laser formed by direct bonding
    23.
    发明授权
    Hybrid III-V silicon laser formed by direct bonding 有权
    通过直接键合形成的混合III-V硅激光器

    公开(公告)号:US08620164B2

    公开(公告)日:2013-12-31

    申请号:US13010232

    申请日:2011-01-20

    IPC分类号: H04B10/00

    摘要: Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.

    摘要翻译: 本文描述的是混合III-V硅激光器,其包括第一半导体区域,其包括来自III族,IV族或V族半导体的半导体材料的层,以形成有源区; 以及第二半导体区域,具有硅波导,并且通过在第一半导体区域的层的室温下直接接合而与第一半导体区域接合。

    Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures
    24.
    发明授权
    Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures 有权
    寻找扫描探针(SSP)存储器,在CMOS兼容温度下形成尖锐的探针尖

    公开(公告)号:US07869334B2

    公开(公告)日:2011-01-11

    申请号:US11725647

    申请日:2007-03-19

    申请人: John Heck

    发明人: John Heck

    IPC分类号: G11B9/00

    摘要: Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip. Embodiments of an apparatus comprising a conductive metal oxide semiconductor (CMOS) wafer including circuitry therein; one or more micro-electro-mechanical (MEMS) probes integrally formed on the CMOS wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and a sharpened tip at or near the free end, the sharpened tip formed by a process comprising forming an unsharpened tip at or near the free end of each cantilever beam, depositing a silicide-forming material over the unsharpened tip, annealing the wafer to sharpen the unsharpened tip, and exposing the sharpened tip.

    摘要翻译: 一种方法的实施例包括在导电金属氧化物半导体(CMOS)晶片上形成一个或多个微电机械(MEMS)探针,其中每个MEMS探针包括具有固定端和自由端的悬臂梁,并且其中所述CMOS晶片 在其上有电路; 在每个悬臂梁的自由端处或附近形成未钝化的尖端; 在尖端上沉积硅化物形成材料; 退火晶片以锐化尖端; 并暴露锋利的尖端。 包括其中包括电路的导电金属氧化物半导体(CMOS)晶片的装置的实施例; 在CMOS晶片上整体形成的一个或多个微机电(MEMS)探针,其中每个MEMS探针包括具有固定端和自由端的悬臂梁,以及在自由端处或附近的尖锐尖端,形成尖锐的尖端 通过包括在每个悬臂梁的自由端处或附近形成未钝化的尖端的方法,在未钝化的尖端上沉积硅化物形成材料,退火晶片以锐化未钝化的尖端,以及暴露尖锐的尖端。

    Method for Forming MEMS Devices Having Low Contact Resistance and Devices Obtained Thereof
    25.
    发明申请
    Method for Forming MEMS Devices Having Low Contact Resistance and Devices Obtained Thereof 有权
    用于形成具有低接触电阻的MEMS器件的方法及其获得的器件

    公开(公告)号:US20100320606A1

    公开(公告)日:2010-12-23

    申请号:US12817631

    申请日:2010-06-17

    IPC分类号: H01L23/532 H01L21/768

    摘要: The present disclosure proposes a method for manufacturing in a MEMS device a low-resistance contact between a silicon-germanium layer and a layer contacted by this silicon-germanium layer, such as a CMOS metal layer or another silicon-germanium layer, through an opening in a dielectric layer stack separating both layers. An interlayer is formed in this opening, thereby covering at least the sidewalls of the opening on the exposed surface of the another layer at the bottom of this opening. This interlayer may comprise a TiN layer in contact with the silicon-germanium layer. This interlayer can further comprise a Ti layer in between the TiN layer and the layer to be contacted. In another embodiment this interlayer comprises a TaN layer in contact with the silicon-germanium layer. This interlayer can then further comprise a Ta layer in between the TaN layer and the layer to be contacted.

    摘要翻译: 本公开提出了一种用于在MEMS器件中制造硅 - 锗层与由该硅 - 锗层接触的层之间的低电阻接触的方法,例如CMOS金属层或另一硅 - 锗层,通过开口 在分离两层的电介质层叠层中。 在该开口中形成中间层,从而至少覆盖在该开口底部的另一层的露出表面上的开口的至少侧壁。 该中间层可以包括与硅 - 锗层接触的TiN层。 该中间层可以进一步包括在TiN层和待接触层之间的Ti层。 在另一个实施方案中,该中间层包括与硅 - 锗层接触的TaN层。 然后该中间层可以进一步包括在TaN层和待接触层之间的Ta层。

    Forming a cantilever assembly for vertical and lateral movement
    26.
    发明授权
    Forming a cantilever assembly for vertical and lateral movement 有权
    形成垂直和横向运动的悬臂组件

    公开(公告)号:US07687297B2

    公开(公告)日:2010-03-30

    申请号:US11824465

    申请日:2007-06-29

    IPC分类号: H01L21/00

    摘要: In one embodiment, the present invention includes a method for forming a sacrificial oxide layer on a base layer of a microelectromechanical systems (MEMS) probe, patterning the sacrificial oxide layer to provide a first trench pattern having a substantially rectangular form and a second trench pattern having a substantially rectangular portion and a lateral portion extending from the substantially rectangular portion, and depositing a conductive layer on the patterned sacrificial oxide layer to fill the first and second trench patterns to form a support structure for the MEMS probe and a cantilever portion of the MEMS probe. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括在微机电系统(MEMS)探针的基底层上形成牺牲氧化物层的方法,图案化牺牲氧化物层以提供具有基本矩形形状的第一沟槽图案和第二沟槽图案 具有基本上矩形的部分和从所述大致矩形部分延伸的横向部分,以及在所述图案化的牺牲氧化物层上沉积导电层以填充所述第一和第二沟槽图案以形成用于所述MEMS探针的支撑结构, MEMS探针。 描述和要求保护其他实施例。

    PROCESS FOR FABRICATING HIGH DENSITY STORAGE DEVICE WITH HIGH-TEMPERATURE MEDIA
    27.
    发明申请
    PROCESS FOR FABRICATING HIGH DENSITY STORAGE DEVICE WITH HIGH-TEMPERATURE MEDIA 审中-公开
    用高温介质制造高密度存储器件的方法

    公开(公告)号:US20090294028A1

    公开(公告)日:2009-12-03

    申请号:US12132139

    申请日:2008-06-03

    IPC分类号: B32B38/10 B32B38/00 B32B37/00

    摘要: A method of fabricating an information storage device comprises providing a media substrate including a first side and a second side, forming a media on the first side of the media substrate, adhesively associating the media with a carrier substrate, thinning a surface of the second side of the media substrate while supporting and protecting the media with the carrier substrate, and forming circuitry on the thinned second side of the media substrate.

    摘要翻译: 一种制造信息存储装置的方法包括提供包括第一侧和第二侧的介质基板,在介质基板的第一侧上形成介质,将介质与载体基板粘合地关联,使第二侧的表面变薄 的介质基板,同时用载体基板支撑和保护介质,以及在介质基板的减薄的第二侧上形成电路。

    ELECTRICALLY-ISOLATED INTERCONNECTS AND SEAL RINGS IN PACKAGES USING A SOLDER PREFORM
    30.
    发明申请
    ELECTRICALLY-ISOLATED INTERCONNECTS AND SEAL RINGS IN PACKAGES USING A SOLDER PREFORM 审中-公开
    使用焊接前提的包装中的电气隔离互连和密封圈

    公开(公告)号:US20070241448A1

    公开(公告)日:2007-10-18

    申请号:US11765969

    申请日:2007-06-20

    IPC分类号: H01L23/12

    摘要: Embodiments include electronic assemblies and methods for forming electronic assemblies. One embodiment includes a method of forming a MEMS device assembly, including forming an active MEMS region on a substrate. A plurality of bonding pads electrically coupled to the active MEMS region are formed. A seal ring wetting layer is also formed on the substrate, the seal ring wetting layer surrounding the active MEMS region. A single piece solder preform is positioned on the bonding pads and on the seal ring wetting layer, the single piece solder preform including a seal ring region and a bonding pad region. The seal ring region is connected to the bonding pad region by a plurality of solder bridges. The method also includes heating the single piece solder preform to a temperature above the reflow temperature, so that the bridges split and the solder from the preform accumulates on the seal ring wetting layer and the bonding pads. A lid is coupled to the solder. In certain embodiments the lid may include vias having conductive material therein for providing electrical contact to the MEMS device. Other embodiments are described and claimed.

    摘要翻译: 实施例包括用于形成电子组件的电子组件和方法。 一个实施例包括形成MEMS器件组件的方法,包括在衬底上形成有源MEMS区域。 形成电耦合到有源MEMS区域的多个接合焊盘。 密封环润湿层也形成在衬底上,围绕有源MEMS区域的密封环润湿层。 单块焊料预制件位于接合焊盘和密封环润湿层上,单件焊料预制件包括密封环区域和焊盘区域。 密封圈区域通过多个焊接桥连接到焊盘区域。 该方法还包括将单件焊料预制件加热到高于回流温度的温度,使得桥接器分裂,并且来自预制件的焊料积聚在密封环润湿层和接合焊盘上。 盖子与焊料相连。 在某些实施例中,盖可以包括其中具有导电材料的通孔,用于提供与MEMS器件的电接触。 描述和要求保护其他实施例。