公开(公告)号：US10573579B2

公开(公告)日：2020-02-25

申请号：US15863984

申请日：2018-01-08

Applicant: MEDIATEK INC.

Inventor： Tai-Yu Chen ,  Wen-Sung Hsu ,  Sheng-Liang Kuo ,  Chi-Wen Pan ,  Jen-Chuan Chen

IPC: H01L23/433 ,  H01L25/18 ,  H01L23/367 ,  H01L23/16 ,  H01L23/36 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L23/373 ,  H01L23/498

Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, an interposer mounted on the top surface of the package substrate, a first semiconductor die and a second semiconductor die mounted on the interposer in a side-by-side manner, and a stiffener ring secured to the top surface of the package substrate. The stiffener ring encircles the first semiconductor die and the second semiconductor die. The stiffener ring comprises a reinforcement rib striding across the interposer.

公开(公告)号：US09280188B2

公开(公告)日：2016-03-08

申请号：US14294170

申请日：2014-06-03

Applicant: MEDIATEK INC.

Inventor： Tai-Yu Chen ,  Wen-Tsan Hsieh ,  Chi-Wei Yang

IPC: H04M1/725 ,  G06F1/20 ,  H04M1/18

CPC classification number: G06F1/206 ,  H04M1/18

Abstract: The present invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract translation: 本发明提供一种热控制方法和热控制系统。 热控制方法包括：检测电子设备的部件的温度变化以产生检测结果; 以及根据所述检测结果，将所述集成电路的温度阈值确定为节流点。 热控制系统包括：检测单元，用于检测电子设备的部件的温度变化以产生检测结果; 以及确定单元，用于根据检测结果将集成电路的温度阈值确定为节流点。

公开(公告)号：US09252068B2

公开(公告)日：2016-02-02

申请号：US14611364

申请日：2015-02-02

Applicant: MediaTek Inc.

Inventor： Tai-Yu Chen ,  Chung-Fa Lee ,  Wen-Sung Hsu ,  Shih-Chin Lin

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/36 ,  H01L23/433 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/3675 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/85

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; a non-planar shaped heat spreading layer, formed over the spacer; an encapsulant layer, formed, over the circuit board, filling spaces between the non-planar shaped heat spreading layer and the circuit board; and a plurality of solder balls, formed over the second surface of the circuit board.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在间隔物上的非平面形散热层; 形成在所述电路板上的密封剂层，在所述非平面形散热层与所述电路板之间填充空间; 以及形成在电路板的第二表面上的多个焊球。

公开(公告)号：US20150350407A1

公开(公告)日：2015-12-03

申请号：US14670418

申请日：2015-03-27

Applicant: Mediatek Inc.

Inventor： Jih-Ming Hsu ,  Wei-Ting Wang ,  Wen-Tsan Hsieh ,  Tai-Yu Chen ,  Chia-Feng Yeh ,  Chien-Tse Fang

IPC: H04M1/725

CPC classification number: H04M1/72569 ,  G06F1/206 ,  H04M1/72525 ,  H04M1/72577

Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract translation: 本发明提供一种热控制方法和热控制系统。 热控制方法包括：检测电子设备的部件的温度变化以产生检测结果; 以及根据检测结果确定集成电路的温度阈值作为节流点。 热控制系统包括：检测单元，用于检测电子设备的部件的温度变化以产生检测结果; 以及确定单元，用于根据检测结果将集成电路的温度阈值确定为节流点。

公开(公告)号：US09000581B2

公开(公告)日：2015-04-07

申请号：US13896616

申请日：2013-05-17

Applicant: MediaTek Inc.

Inventor： Tai-Yu Chen ,  Chung-Fa Lee ,  Wen-Sung Hsu ,  Shih-Chin Lin

IPC: H01L23/36 ,  H01L23/433 ,  H01L23/498

CPC classification number: H01L23/3736 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上，具有第一横截面尺寸; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在电路板上的密封剂层，覆盖半导体芯片并围绕间隔物; 形成在密封剂层和间隔物上的散热层; 以及形成在电路板的第二表面上的多个焊球。

公开(公告)号：US12230560B2

公开(公告)日：2025-02-18

申请号：US17546191

申请日：2021-12-09

Applicant: MEDIATEK INC.

Inventor： Che-Hung Kuo ,  Hsing-Chih Liu ,  Tai-Yu Chen

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/64 ,  H01L25/065

Abstract: A semiconductor package structure includes a frontside redistribution layer, a first semiconductor die, a first capacitor, a conductive terminal, and a backside redistribution layer. The first semiconductor die is disposed over the frontside redistribution layer. The first capacitor is disposed over the frontside redistribution layer and electrically coupled to the first semiconductor die. The conductive terminal is disposed below the frontside redistribution layer and electrically coupled to the frontside redistribution layer. The backside redistribution layer is disposed over the first semiconductor die.

公开(公告)号：US11762439B2

公开(公告)日：2023-09-19

申请号：US16718099

申请日：2019-12-17

Applicant: MEDIATEK INC.

Inventor： Pei-Yu Huang ,  Chih-Yuan Hsiao ,  Chiao-Pin Fan ,  Chi-Wen Pan ,  Tai-Yu Chen ,  Chien-Tse Fang ,  Jih-Ming Hsu ,  Yun-Ching Li

IPC: G05D23/00 ,  G06F1/20 ,  G06F1/3206

CPC classification number: G06F1/206 ,  G06F1/203 ,  G06F1/3206

Abstract: The present invention provides a method of dynamic thermal management applied to a portable device, wherein the method includes the steps of: obtaining a surface temperature of the portable device; obtaining a junction temperature of a chip of the portable device; and calculating an upper limit of the junction temperature according to the junction temperature and the surface temperature.

公开(公告)号：US20230238302A1

公开(公告)日：2023-07-27

申请号：US18129061

申请日：2023-03-30

Applicant: MEDIATEK INC.

Inventor： Chia-Hao Hsu ,  Tai-Yu Chen ,  Sheng-Liang Kuo ,  Bo-Jiun Yang

IPC: H01L23/473 ,  H01L23/16 ,  H01L23/00

CPC classification number: H01L23/473 ,  H01L23/16 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/3511

Abstract: A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.

公开(公告)号：US20230185280A1

公开(公告)日：2023-06-15

申请号：US17993853

申请日：2022-11-23

Applicant: MEDIATEK INC.

Inventor： Chih-Fu Tsai ,  Yu-Chia Chang ,  Bo-Jiun Yang ,  Yen-Hwei Hsieh ,  Shun-Yao Yang ,  Jia-Wei Fang ,  Ta-Chang Liao ,  Tai-Yu Chen

IPC: G05B19/4155

CPC classification number: G05B19/4155 ,  G05B2219/50333

Abstract: An integrated circuit (IC) configurable to perform adaptive thermal ceiling control in a per-functional-block manner, an associated main circuit, an associated electronic device and an associated thermal control method are provided. The IC may include a plurality of hardware circuits arranged to perform operations of a first functional block, and at least one thermal control circuit. At least one temperature sensor is coupled with the first functional block to detect temperature and to generate at least one temperature sensing result of the first functional block. The thermal control circuit performs thermal control on the first functional block to prevent the first functional block from overheating and inducing abnormal function operations, by monitoring the temperature sensing result and by trying to prevent the temperature sensing result from exceeding first temperature upper-limit, wherein the first temperature upper-limit is configurable with respect to per-functional-block thermal operation capability of the first functional block.

公开(公告)号：US11621211B2

公开(公告)日：2023-04-04

申请号：US16881206

申请日：2020-05-22

Applicant: MEDIATEK INC.

Inventor： Ya-Jui Hsieh ,  Chia-Hao Hsu ,  Tai-Yu Chen ,  Yao-Pang Hsu

IPC: H01L23/373 ,  H01L23/367

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a semiconductor die, a molding material, a first bonding layer, and a thermal interface material. The semiconductor die is disposed over the substrate. The molding material surrounds the semiconductor die. The first bonding layer is disposed over the semiconductor die. The thermal interface material is disposed over the molding material.