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    Antenna-in-package with better antenna performance
    24.
    发明授权
    Antenna-in-package with better antenna performance 有权

    公开(公告)号：US10700410B2

    公开(公告)日：2020-06-30

    申请号：US16145108

    申请日：2018-09-27

    Applicant: MEDIATEK INC.

    Inventor： Yen-Ju Lu ,  Wen-Chou Wu

    IPC: H01L23/34 ,  H01Q1/22 ,  H01Q1/48 ,  H01Q1/52 ,  H01Q21/12 ,  H01Q9/26 ,  H01Q21/06 ,  H01L23/28 ,  H01L23/528 ,  H01L23/64 ,  H01L23/66

    Abstract: An Antenna-in-Package (AiP) includes an interface layer, an integrated circuit die disposed on the interface layer, a molding compound disposed on the interface layer and encapsulating the integrated circuit die, and a plurality of solder balls disposed on a bottom surface of the interface layer. The interface layer includes an antenna layer, and an insulating layer between the antenna layer and the ground reflector layer. The antenna layer includes a first antenna region and a second antenna region spaced apart from the first antenna region. The integrated circuit die is interposed between the first antenna region and the second antenna region. The first antenna region is disposed adjacent to a first edge of the integrated circuit die, and the second antenna region is disposed adjacent to a second edge of the integrated circuit die, which is opposite to the first edge.

    Semiconductor package integrated with memory die
    25.
    发明授权
    Semiconductor package integrated with memory die 有权

    公开(公告)号：US10446508B2

    公开(公告)日：2019-10-15

    申请号：US15682908

    申请日：2017-08-22

    Applicant: MEDIATEK INC.

    Inventor： Sheng-Mou Lin ,  Chih-Chun Hsu ,  Wen-Chou Wu

    IPC: H01L23/66 ,  H01L23/64 ,  H01L23/552 ,  H01L25/065 ,  H01L25/18

    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a package substrate. An integrated circuit (IC) die having a radio frequency (RF) circuit and a memory die are stacked over the package substrate. The memory die entirely covers a first surface portion of the package substrate to define a second surface portion of the package substrate exposed from the memory die, and the IC die partially covers the first surface portion and the second surface portion of the package substrate. The RF circuit includes a first sensitive device region corresponding to the second surface portion of the package substrate and a second sensitive device region corresponding to the first surface portion of the package substrate and offsetting a memory input/output (I/O) electrical path of the memory die, as viewed from a top-view perspective.

    SEMICONDUCTOR PACKAGE WITH TSV DIE
    29.
    发明申请
    SEMICONDUCTOR PACKAGE WITH TSV DIE 有权

    公开(公告)号：US20230116326A1

    公开(公告)日：2023-04-13

    申请号：US17938911

    申请日：2022-09-06

    Applicant: MEDIATEK INC.

    Inventor： Ya-Lun Yang ,  Wen-Chou Wu ,  Che-Hung Kuo

    IPC: H01L23/48 ,  H01L25/16 ,  H01L23/00 ,  H01L23/498

    Abstract: A semiconductor package includes a bottom package having a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die has an active surface and a rear surface coupled to the top surface of the substrate. The semiconductor die comprises through silicon vias. A top package is stacked on the bottom package. The top package comprises a memory component. A middle re-distribution layer (RDL) structure is disposed between the top package and the bottom package. The active surface of the semiconductor die is directly connected to the middle RDL structure through connecting elements. The memory component is electrically connected to the substrate via the interconnect structures of the middle RDL structure and the through silicon vias of the semiconductor die.

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