公开(公告)号：US07315070B2

公开(公告)日：2008-01-01

申请号：US10960990

申请日：2004-10-12

申请人： Akira Okada ,  Mitsuru Sato ,  Hideo Sato

发明人： Akira Okada ,  Mitsuru Sato ,  Hideo Sato

IPC分类号： H01L29/84 ,  G06K9/00

CPC分类号： H01L27/14678 ,  G06K9/00053 ,  H01L24/32 ,  H01L27/14618 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00

摘要： A fingerprint sensor package includes an LSI chip for reading a fingerprint, a substrate having an external connection terminal and to which the LSI chip is fixed, and a chip fixing mechanism for fixing the LSI chip in a state where the LSI chip is deformed so as to form a curved surface, provided between the LSI chip and the substrate.

摘要翻译： 指纹传感器封装包括用于读取指纹的LSI芯片，具有外部连接端子并且LSI芯片被固定的基板，以及用于在LSI芯片变形的状态下固定LSI芯片的芯片固定机构，以便 以形成设置在LSI芯片和基板之间的曲面。

公开(公告)号：US20070028203A1

公开(公告)日：2007-02-01

申请号：US11258176

申请日：2005-10-26

申请人： Mitsuru Sato ,  Hiroji Takeyama ,  Yuki Kumon ,  Tomoki Kanemochi

发明人： Mitsuru Sato ,  Hiroji Takeyama ,  Yuki Kumon ,  Tomoki Kanemochi

IPC分类号： G06F17/50

CPC分类号： G06F17/50

摘要： To create a function verification description, which is used for verifying a result of simulation performed on a finite state machine, irrespective of description languages of designing an FSM and creating the function verification description even by a person without knowledge of the language and the creation method of the function verification description, there is provided an apparatus including: an extracting section for extracting data concerning a performance that is a subject for the simulation from specification data of the FSM; a retaining section for retaining one or more description templates for function verification descriptions which are associated with one or more performances that are subjects for simulation; a selecting section for selecting a description template corresponding to the first performance; and a creating section for creating the function verifying description by substituting the data concerning the first performance into the particular description template selected.

摘要翻译： 为了创建功能验证描述，用于验证在有限状态机上执行的模拟结果，而不管设计FSM的描述语言以及甚至由没有语言知识的人创建功能验证描述和创建方法 提供了一种装置，包括：提取部分，用于从FSM的指定数据中提取与模拟对象的性能有关的数据; 一个保留部分，用于保存与作为模拟对象的一个​​或多个演奏相关联的功能验证描述的一个或多个描述模板; 选择部分，用于选择与第一演奏相对应的描述模板; 以及创建部分，用于通过将关于第一表演的数据替换到所选择的特定描述模板中来创建功能验证描述。

公开(公告)号：US07148148B2

公开(公告)日：2006-12-12

申请号：US10309198

申请日：2002-12-04

申请人： Yoshiaki Mori ,  Takuya Miyakawa ,  Mitsuru Sato ,  Shintaro Asuke ,  Kenichi Takagi

发明人： Yoshiaki Mori ,  Takuya Miyakawa ,  Mitsuru Sato ,  Shintaro Asuke ,  Kenichi Takagi

IPC分类号： H01L21/302

CPC分类号： H01L21/76838 ,  C25D5/022 ,  C25D7/12 ,  H01L21/0272 ,  H01L21/0274 ,  H01L21/288 ,  H01L21/31127 ,  H01L21/31133

摘要： A mask forming method that can reduce manufacturing cost is disclosed. The method forms a mask on the surface of a member to be processed in order to form a desired pattern using liquid material for patterning. The method also includes applying resist to the entire surface of the member to be processed, drying the applied resist, patterning by removing the resist in a pattern-formation area using photolithography, and heating the resist.

摘要翻译： 公开了一种降低制造成本的掩模形成方法。 该方法在待加工构件的表面上形成掩模，以便使用液体材料形成图案化所需的图案。 该方法还包括将抗蚀剂施加到待加工构件的整个表面，干燥所施加的抗蚀剂，通过使用光刻法去除图案形成区域中的抗蚀剂，并加热抗蚀剂来进行图案化。

公开(公告)号：US07098121B2

公开(公告)日：2006-08-29

申请号：US10367854

申请日：2003-02-19

申请人： Yoshiaki Mori ,  Takuya Miyakawa ,  Mitsuru Sato ,  Shintaro Asuke ,  Kenichi Takagi

发明人： Yoshiaki Mori ,  Takuya Miyakawa ,  Mitsuru Sato ,  Shintaro Asuke ,  Kenichi Takagi

IPC分类号： H01L21/22

CPC分类号： H01L21/3127 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/0272 ,  H01L21/0273 ,  H01L21/288 ,  H01L21/76838 ,  H01L27/1292

摘要： An object is to provide a mask formation method, which can curtail a manufacturing cost.A method of forming a film of predetermined pattern on the front surface of a member to-be-processed is so constructed as to carry out the step (S178) of improving the adherence of a pattern material solution to the member to-be-processed, the step (S180) of filling up a pattern forming recess provided in a mask on the surface of the member to-be-processed with a pattern material solution, the step (S186) of improving the film quality of the pattern film to-be-formed by processing the pattern material solution, the step (S188) of removing the pattern material solution having adhered on the mask, the step (S190) of drying the pattern material solution, and the step (S196) of subjecting the pattern film to annealing processing.

摘要翻译： 目的在于提供掩模形成方法，可以减少制造成本。 在待处理构件的正面上形成预定图案的膜的方法被构造成执行改善图案材料溶液与要被加工的构件的粘附的步骤（S 178） 在图案材料溶液的待处理部件的表面上填充设置在掩模中的图案形成用凹部的工序（S180），提高图案的膜质量的工序（S188） 通过处理图案材料溶液形成的薄膜，去除已经粘附在掩模上的图案材料溶液的步骤（S 188），干燥图案材料溶液的步骤（S190）和步骤（S1996） ）对图案膜进行退火处理。

公开(公告)号：US07091546B2

公开(公告)日：2006-08-15

申请号：US11038173

申请日：2005-01-21

申请人： Mitsuru Sato ,  Hirofumi Inoue ,  Masaru Kito

发明人： Mitsuru Sato ,  Hirofumi Inoue ,  Masaru Kito

IPC分类号： H01L29/772

CPC分类号： H01L27/10867

摘要： A semiconductor device includes semiconductor substrate, a trench capacitor formed in the semiconductor substrate, a cell transistor formed so as to the trench capacitor and having a gate electrode formed on the semiconductor substrate and a source/drain region formed in a surface of the semiconductor substrate, an impurity diffusion region formed in the semiconductor substrate so as to be electrically connected between the trench capacitor and the source/drain region, and a Ge inclusion region formed between the impurity diffusion region and the trench capacitor.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底中的沟槽电容器，形成为沟槽电容器的单元晶体管，并且具有形成在半导体衬底上的栅极电极和形成在半导体衬底的表面中的源极/漏极区域 形成在半导体衬底中以便电连接在沟槽电容器和源极/漏极区之间的杂质扩散区域和形成在杂质扩散区域和沟槽电容器之间的Ge包含区域。

公开(公告)号：US06907394B1

公开(公告)日：2005-06-14

申请号：US09570389

申请日：2000-05-12

申请人： Mitsuru Sato

发明人： Mitsuru Sato

IPC分类号： G01R31/28 ,  G06F9/45 ,  G06F17/50 ,  G06G7/62 ,  H01L21/82

CPC分类号： G06F17/5022 ,  G06F17/5036

摘要： A device for simulating circuits is provided with an identifying system and a verifying system. The identifying system identifies a pair of wires in which two signals operate simultaneously within an appointed period and a pair of wires in which two signals do not operate almost simultaneously within the appointed period. The verifying system verifies actions of a circuit to be analyzed, under an assumption that the coupling capacitor between the pair of wires in which it is judged by the identifying system that two signals do not simultaneously operate within the appointed period is a ground capacitor.

摘要翻译： 用于模拟电路的装置设置有识别系统和验证系统。 识别系统识别一条电线，其中两个信号在指定时间段内同时操作，并且一对电线，其中两个信号在指定时段内几乎不同时操作。 验证系统验证要分析的电路的动作，假设由识别系统判断两条信号在指定时段内不同时工作的一对导线之间的耦合电容器是接地电容器。

公开(公告)号：US20050095801A1

公开(公告)日：2005-05-05

申请号：US10947388

申请日：2004-09-23

申请人： Mitsuru Sato ,  Hirofumi Inoue

发明人： Mitsuru Sato ,  Hirofumi Inoue

IPC分类号： H01L21/334 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94 ,  H01L21/20 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L27/1087 ,  H01L27/10829 ,  H01L27/10867 ,  H01L29/66181 ,  H01L29/945

摘要： A trench capacitor comprises a semiconductor substrate, a trench provided in the semiconductor substrate, a first doped polysilicon filled in the trench at a lower end of the trench via a first dielectric film, and a second doped polysilicon filled in the trench at an upper end of the trench via a second dielectric film, the second doped polysilicon being contiguously disposed to the first doped polycrystal silicon, wherein the second dielectric film consists of an oxide film using radicals.

摘要翻译： 沟槽电容器包括半导体衬底，设置在半导体衬底中的沟槽，经由第一电介质膜填充在沟槽的下端处的沟槽中的第一掺杂多晶硅，以及在上端填充在沟槽中的第二掺杂多晶硅 的第二电介质膜，所述第二掺杂多晶硅连续地设置在所述第一掺杂多晶硅上，其中所述第二电介质膜由使用自由基的氧化膜组成。

公开(公告)号：US06657877B2

公开(公告)日：2003-12-02

申请号：US09966769

申请日：2001-09-28

申请人： Masato Kashima ,  Mitsuru Sato ,  Eiji Kuroda ,  Hironobu Shiroyama

发明人： Masato Kashima ,  Mitsuru Sato ,  Eiji Kuroda ,  Hironobu Shiroyama

IPC分类号： H02M7217

CPC分类号： H02M7/217 ,  H02M3/156

摘要： A power supply circuit improves the power factor when the load is light, and incorporates a starting circuit for reacting quickly to the changes in the output from the power supply circuit and a short-circuit detecting means for detecting the short-circuit of the feedback signal. The apparatus includes: an error amplifier; a comparator that monitors the output from the error amplifier and generates an offset regulating current ISO; a multiplier; a sensing current comparator that compares the output signal from the multiplier and the AC line current and generates a reset signal; a timer that directly monitors the inputted zero-cross signal; and a comparator for short-circuit detection, that facilitates reducing the exterior parts and components.

公开(公告)号：US06540219B1

公开(公告)日：2003-04-01

申请号：US09646282

申请日：2000-10-12

申请人： Akira Naruse ,  Kouichi Kumon ,  Mitsuru Sato

发明人： Akira Naruse ,  Kouichi Kumon ,  Mitsuru Sato

IPC分类号： B65H106

CPC分类号： B65H3/5238 ,  B65H3/063 ,  B65H3/54 ,  B65H2403/42 ,  B65H2403/481 ,  B65H2513/41 ,  B65H2513/51 ,  B65H2220/02 ,  B65H2220/01

摘要： A paper feed apparatus having a pickup mechanism to pick up a plurality of paper sheets stacked on a chute one by one from the bottom and carrying the paper sheets to a predetermined standby position, comprises a gate 2 disposed facing a pickup roller 1 almost vertically with respect to the direction of paper feed to form a predetermined clearance, a paper-sheet separating pad 3 disposed in sliding contact with the pickup roller 1 to pick up the paper placed on the standby position one by one, and a pickup arm 4 that can be driven to be moved upward when setting paper sheets and downward when feeding paper sheets to push from above the paper sheets stacked on a chute 13 near a paper-sheet feed port. The pickup arm 4,when brought into free state as the planetary gear 5 disengages from the drive power transmission system, pushes paper sheets with a pushing force that increases with increases in the number of paper sheets stacked on the chute 13.

摘要翻译： 一种具有拾取机构的进纸装置，用于从底部一个接一个地从底部拾取多个纸张，并将纸张运送到预定的待机位置，包括：几乎垂直地面向拾取辊1设置的门2， 相对于进纸方向形成预定的间隙，设置成与拾取辊1滑动接触的纸张分离垫3一个接一个地拾起放置在备用位置上的纸张;以及拾取臂4，其可以 当纸张从纸张上方堆放在靠近纸张进纸口的滑槽13上方时，将纸张向下移动以向上移动。 当行星齿轮5与驱动动力传动系统脱离接合时，拾取臂4随着随着在滑槽13上堆叠的纸张数量的增加而增加的推力推动纸张。

公开(公告)号：US06526480B1

公开(公告)日：2003-02-25

申请号：US09646704

申请日：2000-09-21

申请人： Akira Naruse ,  Kouichi Kumon ,  Mitsuru Sato

发明人： Akira Naruse ,  Kouichi Kumon ,  Mitsuru Sato

IPC分类号： G06F1200

CPC分类号： G06F9/3834 ,  G06F9/383 ,  G06F9/3842 ,  G06F12/0815 ,  G06F12/0831

摘要： The invention relates to cache apparatuses and a control method for managing cache memories in a multiprocessor system. A cache controller holds data which has to be invalidated for a cache coherence as data in a status where the validity is unknown, causes a cache hit in response to a reading request from a processor, provides the data as speculation data, and allows the processor to speculatively process the data. Therefore, since the data which has to be obtained from another cache or a main storage due to the invalidation is held in an Unknown status, a cache hit occurs. Thus, a data waiting time of the processor can be shortened.

摘要翻译： 本发明涉及高速缓存设备和用于在多处理器系统中管理高速缓存存储器的控制方法。 高速缓存控制器将对于高速缓存一致性必须被无效的数据保存为有效性未知状态的数据，导致响应于来自处理器的读取请求的高速缓存命中，将数据提供为推测数据，并允许处理器 推测处理数据。 因此，由于由于无效而必须从另一高速缓存或主存储器获得的数据保持在未知状态，所以发生高速缓存命中。 因此，可以缩短处理器的数据等待时间。