-
公开(公告)号：US20210083633A1
公开(公告)日：2021-03-18
申请号：US17091146
申请日：2020-11-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE
Abstract: A first transmission line and a second transmission line that are connected in series to each other are disposed at different positions in a thickness direction of a substrate. A third transmission line is disposed between the first transmission line and the second transmission line in the thickness direction of the substrate. The third transmission line includes a first end portion connected to one end portion of the first transmission line, and a second end portion that is AC-grounded. The first transmission line and the second transmission line are electromagnetically coupled to the third transmission line.
-
公开(公告)号：US20200304071A1
公开(公告)日：2020-09-24
申请号：US16898156
申请日：2020-06-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Masatoshi HASE , Norio HAYASHI , Kazuo WATANABE , Yuuri HONDA
Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
-
公开(公告)号：US20170359038A1
公开(公告)日：2017-12-14
申请号：US15600993
申请日：2017-05-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kazuo WATANABE , Takayuki TSUTSUI , Masao KONDO , Satoshi ARAYASHIKI , Fumio HARIMA , Masatoshi HASE
IPC: H03F3/24 , H04L5/14 , H03F3/21 , H03F3/195 , H04L5/00 , H03F1/56 , H03F1/02 , H03F3/00 , H04W88/00
CPC classification number: H03F3/245 , H03F1/0205 , H03F1/0272 , H03F1/0277 , H03F1/22 , H03F1/565 , H03F3/005 , H03F3/195 , H03F3/21 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/408 , H03F2200/451 , H03F2200/555 , H04L5/0007 , H04L5/14 , H04W88/00
Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
-
公开(公告)号：US20170207756A1
公开(公告)日：2017-07-20
申请号：US15475420
申请日：2017-03-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE
CPC classification number: H04B1/04 , H03F1/0261 , H03F1/56 , H03F3/19 , H03F3/191 , H03F3/21 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/318 , H03F2200/336 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2200/555 , H04B2001/0416
Abstract: A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.
-
公开(公告)号：US20170085232A1
公开(公告)日：2017-03-23
申请号：US15364690
申请日：2016-11-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE
CPC classification number: H04B1/04 , H03F1/0261 , H03F1/56 , H03F3/19 , H03F3/191 , H03F3/21 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/318 , H03F2200/336 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2200/555 , H04B2001/0416
Abstract: A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.
-
Patent Agency Ranking
公开(公告)号：US20250022873A1
公开(公告)日：2025-01-16
申请号：US18901620
申请日：2024-09-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masayuki AOIKE , Shinnosuke TAKAHASHI , Masatoshi HASE , Fumio HARIMA
IPC: H01L27/06 , H01L23/00 , H01L23/14 , H01L23/373 , H01L23/528 , H01L29/205 , H01L29/737
Abstract: A bonding layer including a first metal region is disposed on at least a portion of an upper surface of a support substrate. An underlying layer including a sub-collector region that is made of a conductive semiconductor material and is electrically connected to the first metal region is disposed on the bonding layer. A first transistor including a collector layer electrically connected to the sub-collector region, a base layer disposed on the collector layer, and an emitter layer disposed on the base layer is disposed on the sub-collector region. On the sub-collector region, a collector electrode electrically connected to the sub-collector region is located outward of the first transistor to overlap the first metal region in plan view.
-
公开(公告)号：US20240396516A1
公开(公告)日：2024-11-28
申请号：US18792234
申请日：2024-08-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Seiko NETSU , Masatoshi HASE
Abstract: A balanced-to-unbalanced transformer circuit is formed with a transmission line including a main line and a sub-line which are coupled to each other. The main line comprises at least one wiring line. The sub-line comprises multiple wiring lines which are connected in parallel to one another and which are other than the at least one wiring line. Each of the wiring lines of the sub-line is coupled to the at least one wiring line of the main line.
-
公开(公告)号：US20240162870A1
公开(公告)日：2024-05-16
申请号：US18503549
申请日：2023-11-07
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE , Koudai SUGIYAMA , Masamichi TOKUDA , Seiko NETSU
IPC: H03F3/45
CPC classification number: H03F3/45475 , H03F2200/06 , H03F2200/09 , H03F2200/451
Abstract: A main line (transmission line) having a first end and a second end. A sub-line (transmission line) coupled to the main line. An unbalanced signal is input to and output from an unbalanced node connected to the first end. A balanced signal is input to and output from a first balanced node and a second balanced node. The main line and the sub-line are coupled to each other. A direction of the main line is identical to a direction of the sub-line. The second end and the third end are connected to a reference potential. The first balanced node and the second balanced node are connected to the unbalanced node and the fourth end, respectively. A first LC resonant circuit is connected between the second end and the reference potential or the third end and the reference potential.
-
公开(公告)号：US20240162866A1
公开(公告)日：2024-05-16
申请号：US18507482
申请日：2023-11-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE
Abstract: There are included a first amplifier and a second amplifier electrically connected to a stage subsequent to the first amplifier, a third amplifier and a fourth amplifier electrically connected to a stage subsequent to the third amplifier, a phase shifter that makes a phase of a radio-frequency signal passing through a first path different from a phase of a radio-frequency signal passing through a second path, a first bias circuit that supplies a bias to the first amplifier and the third amplifier, a second bias circuit that supplies a bias to the first amplifier and the second amplifier, and a third bias circuit that supplies a bias to the third amplifier and the fourth amplifier. The second amplifier includes a second transistor, the fourth amplifier includes a fourth transistor, the second bias circuit includes a sixth transistor, and the third bias circuit includes a seventh transistor.
-
公开(公告)号：US20240088850A1
公开(公告)日：2024-03-14
申请号：US18515574
申请日：2023-11-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Masatoshi HASE , Tsutomu OONARO , Takashi SOGA
CPC classification number: H03F3/245 , H03F1/0211 , H03F3/195 , H03F2200/451
Abstract: A transmission circuit appropriately controls output power in response to fluctuations in the impedance of a load. A transmission circuit includes: a transistor to which a bias current IB1 is supplied and that amplifies and outputs an input signal RFin; a transistor to which a bias current IB2 is supplied, that has a collector connected to the collector of the transistor, and that amplifies and outputs the input signal; a current generation circuit that generates a current I2 on the basis of a current I1 from the emitter of the transistor; and a bias control circuit that outputs a first bias control signal for controlling the bias current IB1 and a second bias control signal for controlling the bias current IB2 on the basis of the current I2.
-
-
-
-
-
-
-
-
-
Search Results
41
records
(took 0.018 seconds)
