公开(公告)号：US20210134788A1

公开(公告)日：2021-05-06

申请号：US17149851

申请日：2021-01-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shigeki KOYA ,  Takayuki TSUTSUI ,  Kazuhito NAKAI ,  Yusuke TANAKA

IPC: H01L27/06 ,  H01L23/522 ,  H01L23/528 ,  H01L29/66

Abstract: A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.

公开(公告)号：US20180254759A1

公开(公告)日：2018-09-06

申请号：US15970074

申请日：2018-05-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Fumio HARIMA

IPC: H03F3/72 ,  H03F1/56

CPC classification number: H03F3/72 ,  H03F1/56 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/7209 ,  H03F2203/7236 ,  H04B1/006 ,  H04B1/40

Abstract: Provided is a power amplification module that supports a plurality of communication systems. The power amplification module includes: two power amplifiers that can be selectively connected in parallel with each other; a switch that, in accordance with one communication system selected from among the plurality of communication systems, selects one power amplifier that is to operate by itself from among the two power amplifiers or selects the two power amplifiers and connects the two power amplifiers in parallel with each other; and a phase correction circuit that, when the two power amplifiers are both selected, corrects a phase difference by being selectively connected between the outputs of the two selected power amplifiers such that a phase difference is not generated between the output signals of the two selected power amplifiers.

公开(公告)号：US20180226933A1

公开(公告)日：2018-08-09

申请号：US15890490

申请日：2018-02-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Tadashi MATSUOKA ,  Satoshi TANAKA

IPC: H03G3/30 ,  H03F3/19 ,  H03F3/21 ,  H03F1/02 ,  G05F1/56

CPC classification number: H03G3/3042 ,  G05F1/56 ,  H03F1/0211 ,  H03F1/0216 ,  H03F1/0261 ,  H03F3/19 ,  H03F3/193 ,  H03F3/21 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/18 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/408 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/21142 ,  H03G3/007 ,  H03G3/3047

Abstract: In a power amplifier module for performing slope control of a transmitting signal, a gain variation due to a variation in battery voltage is suppressed while suppressing an increase in circuit size. The power amplifier module includes: a first regulator for outputting a first voltage corresponding to a control voltage for controlling a signal level; a second regulator for outputting a second voltage that rises as a battery voltage drops; a first amplifier supplied with the first voltage as a power-supply voltage to amplify an input signal and output an amplified signal; and a second amplifier for amplifying the amplified signal, wherein the second amplifier includes a first amplification unit supplied with the second voltage as the power-supply voltage to amplify the amplified signal, and a second amplification unit supplied with the battery voltage as the power-supply voltage to amplify the amplified signal.

公开(公告)号：US20180102742A1

公开(公告)日：2018-04-12

申请号：US15840414

申请日：2017-12-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke SHIMAMUNE ,  Satoshi TANAKA ,  Takayuki TSUTSUI ,  Hayato NAKAMURA ,  Kazuhito NAKAI ,  Fuminori MORISAWA

IPC: H03F1/02 ,  H03F3/193 ,  H03F1/30 ,  H03F3/191 ,  H03F3/21 ,  H03F3/04

CPC classification number: H03F1/0222 ,  G05F3/262 ,  H03F1/301 ,  H03F1/302 ,  H03F3/04 ,  H03F3/191 ,  H03F3/193 ,  H03F3/21 ,  H03F2200/18 ,  H03F2200/451

Abstract: Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.

公开(公告)号：US20170187402A1

公开(公告)日：2017-06-29

申请号：US15455860

申请日：2017-03-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Satoshi TANAKA ,  Hidenori OBIYA

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H03F1/0277 ,  H03F1/32 ,  H03F3/195 ,  H03F3/211 ,  H03F3/24 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/318 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2203/7209 ,  H04B1/0458 ,  H04B15/00 ,  H04B2001/0408

Abstract: A power amplification module includes a first input terminal arranged to receive a first transmission signal in a first frequency band, a second input terminal arranged to receive a second transmission signal in a second frequency band higher than the first frequency band, a first amplification circuit that amplifies the first transmission signal, a second amplification circuit that amplifies the second transmission signal, a first filter circuit located between the first input terminal and the first amplification circuit, and a second filter circuit located between the second input terminal and the second amplification circuit. The first filter circuit is a low-pass filter that allows the first frequency band to pass therethrough and that attenuates a harmonic of the first transmission signal and the second transmission signal. The second filter circuit is a high-pass filter that allows the second frequency band to pass therethrough and that attenuates the first transmission signal.

公开(公告)号：US20160381648A1

公开(公告)日：2016-12-29

申请号：US15082567

申请日：2016-03-28

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi TANAKA ,  Takayuki TSUTSUI ,  Yusuke TANAKA ,  Hayato NAKAMURA ,  Kazuhito NAKAI

IPC: H04W52/52 ,  H04B7/26 ,  H04L5/14

CPC classification number: H04W52/52 ,  H03F1/0261 ,  H03F3/195 ,  H03F3/245 ,  H03F3/68 ,  H03F2200/111 ,  H04B7/265 ,  H04L5/14 ,  H04W72/042 ,  H04W88/06

Abstract: Provided is a communication unit that includes first and second power-amplification modules, which can be integrated. The first power-amplification module includes a first power-amplifier for a first frequency band in a first communication scheme, a second power-amplifier for a second frequency band in the first communication scheme, a third power-amplifier for a third frequency band in a second communication scheme, a fourth power-amplifier for a fourth frequency band in the second communication scheme, a first bias circuit that generates a first bias current to the first and second power-amplifiers, and a bias current circuit that converts the first bias current into a second bias current to the third and fourth power-amplifiers. The second power-amplification module includes a fifth power-amplifier for a fifth frequency band in the first communication scheme, and a second bias circuit that generates a third bias current to the fifth power-amplifier.

Abstract translation: 提供了包括可以集成的第一和第二功率放大模块的通信单元。 第一功率放大模块包括第一通信方式中用于第一频带的第一功率放大器，第一通信方式中用于第二频带的第二功率放大器，用于第三通频方式中的第三频带的第三功率放大器 第二通信方案，用于第二通信方案中的第四频带的第四功率放大器，向第一和第二功率放大器产生第一偏置电流的第一偏置电路，以及将第一偏置 电流进入第三和第四功率放大器的第二偏置电流。 第二功率放大模块包括用于第一通信方案中的第五频带的第五功率放大器和向第五功率放大器产生第三偏置电流的第二偏置电路。

公开(公告)号：US20140015568A1

公开(公告)日：2014-01-16

申请号：US14026076

申请日：2013-09-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yusuke SHIMAMUNE ,  Yasunobu YOSHIZAKI ,  Norio HAYASHI ,  Takayuki TSUTSUI

IPC: H04W52/52

CPC classification number: H04W52/52 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2203/7209 ,  H03G3/3042

Abstract: In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods. For example, current resulting from multiplication of the output current from the log detection portion by ×6/5 is added to the output current from the linear detection portion to realize a log detection method and, current resulting from multiplication of the output current from the log detection portion by ×1/5 is added to current resulting from multiplication of the output current from the linear detection portion by ×3 to realize a log-linear detection method.

Abstract translation: 在半导体集成电路装置和射频功率放大器模块中，提供包括多级放大器电路，多电平检测电路，加法器电路和包括电平检测电路的线性检测部分的对数检测部分。 来自对数检测部分的输出电流和来自线性检测部分的输出电流乘以不同的系数，并且相乘的结果相加以实现多种检测方法。 例如，将从日志检测部分的输出电流乘以×6/5产生的电流被加到来自线性检测部分的输出电流中，以实现对数检测方法，并且由与来自 将来自线性检测部分的输出电流乘以×3的电流加上×1/5的对数检测部分，以实现对数线性检测方法。

公开(公告)号：US20250007473A1

公开(公告)日：2025-01-02

申请号：US18883118

申请日：2024-09-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takayuki TSUTSUI ,  Shinnosuke TAKAHASHI

IPC: H03F3/24 ,  H03F1/56

Abstract: A substrate ground conductor made of a semiconductor is provided. A transistor is configured with a collector layer, a base layer, and an emitter layer laminated on a substrate. A clamp circuit is configured with a plurality of elements disposed on the substrate. The clamp circuit is connected between the collector layer and the ground conductor or between the base layer and the ground conductor. The plurality of elements of the clamp circuit include a diode circuit made of a plurality of diodes, and a resistance element connected in series to the diode circuit. The resistance element is configured with a part of an epitaxial layer formed on the substrate.

公开(公告)号：US20240014296A1

公开(公告)日：2024-01-11

申请号：US18474088

申请日：2023-09-25

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shigeki KOYA ,  Masao KONDO ,  Shaojun MA ,  Satoshi GOTO ,  Kenji SASAKI ,  Takayuki TSUTSUI ,  Kazuhito NAKAI

IPC: H01L29/737 ,  H01L29/06 ,  H01L27/082 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/737 ,  H01L29/0603 ,  H01L27/082 ,  H01L29/41708 ,  H01L29/42304

Abstract: In a semiconductor device, plural cells are disposed side by side on a substrate in a first direction. Each of the plural cells includes a bipolar transistor, an emitter electrode contained in a base layer of the bipolar transistor as viewed from above, and a base electrode. The bipolar transistors of the plural cells are connected in parallel with each other. Among the plural cells, the breakdown resistance of at least one second cell, which is other than a first cell disposed at each end, is higher than that of the first cell. It is possible to provide a semiconductor device that can reduce the deterioration of the breakdown resistance when flip-chip mounting is employed, as well as when face-up mounting is employed.

公开(公告)号：US20230276372A1

公开(公告)日：2023-08-31

申请号：US18142469

申请日：2023-05-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi TANAKA ,  Kiichiro TAKENAKA ,  Takayuki TSUTSUI ,  Taizo YAMAWAKI ,  Shun IMAI

IPC: H04W52/24 ,  H03F1/02 ,  H04W52/02 ,  H03F3/19 ,  H03F3/189 ,  H03F3/24 ,  H03F3/21 ,  H04B1/04

CPC classification number: H04W52/246 ,  H03F1/0227 ,  H03F1/0277 ,  H04W52/0251 ,  H03F3/19 ,  H03F3/189 ,  H03F3/24 ,  H03F3/21 ,  H04W52/0261 ,  H03F1/0216 ,  H04B1/0475 ,  Y02D30/70 ,  H03F2200/102 ,  H03F2200/504 ,  H03F2200/294 ,  H04W88/06

Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.