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公开(公告)号:US10921958B2
公开(公告)日:2021-02-16
申请号:US16747936
申请日:2020-01-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Wooyong Lee , Junyoung Park , Myunghan You , Jungeun Lee , Inho Jeong , Chanmin Park
IPC: G06F3/048 , G06F3/0482 , G06F3/0481 , G06F3/0484 , G06T11/00
Abstract: An electronic device and method are disclosed. The electronic device includes: an input circuitry, a display, a camera, a communication circuitry, a processor operatively connected to the input circuitry, the display, the camera, and the communication circuitry, and a memory operatively connected to the processor. The processor implements the method, including display, on the display, one or more images depicting characters selectable as avatars, detect via the input circuitry a selection of a character as an avatar, set the selected character as the avatar, replacing an object included in an image captured by the camera, and display, on the display, one or more icons representing one or more packages including a first package associated with the selected character, based on identification information for the selected character.
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公开(公告)号:US12272396B2
公开(公告)日:2025-04-08
申请号:US18449066
申请日:2023-08-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junyoung Park , Younghoon Son , Hyunyoon Cho , Youngdon Choi , Junghwan Choi
IPC: G11C11/4093 , G06F13/16 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4096 , G11C29/12 , G11C29/18 , G11C29/42 , H03K5/1534 , H04L25/02 , H04L25/03 , H04L25/06 , H04L25/49
Abstract: In a method of generating a multi-level signal having one of three or more voltage levels that are different from one another, input data including two or more bits is received. A drive strength of at least one of two or more driving paths is changed based on the two or more bits such that a first transition time, during which an output data signal is transitioned from a first voltage level to a second voltage level, is changed. The output data signal that is the multi-level signal is generated such that the first transition time of the output data signal is changed and a second transition time, during which the output data signal is transitioned from the first voltage level to a third voltage level different from the second voltage level, is maintained.
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公开(公告)号:US12119306B2
公开(公告)日:2024-10-15
申请号:US18307277
申请日:2023-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Il Choi , Gyuho Kang , Un-Byoung Kang , Byeongchan Kim , Junyoung Park , Jongho Lee , Hyunsu Hwang
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/10
CPC classification number: H01L23/5389 , H01L23/3128 , H01L23/49811 , H01L23/49822 , H01L23/49838 , H01L23/5383 , H01L24/16 , H01L25/105 , H01L2224/16225
Abstract: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.
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公开(公告)号:US20240241802A1
公开(公告)日:2024-07-18
申请号:US18383350
申请日:2023-10-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junyoung Park , Joohwan Kim , Jindo Byun , Eunseok Shin , Hyunyoon Cho , Junghwan Choi
CPC classification number: G06F11/1604 , G06F1/10 , G06F2201/805
Abstract: The memory device includes a clock receiver receiving an external clock signal, a transmitter receiving first to Nth data in parallel and sequentially outputting the first to Nth data based on first to Nth clock signals including different phases, and a QEC circuit correcting a skew between the first to Nth clock signals, wherein the external clock signal includes a same frequency as the first to Nth clock signals, and the QEC circuit selectively receives the first clock signal among the first to Nth clock signals, generates the second clock signal including a phase different from a phase of the first clock signal based on a delay operation with respect to the first clock signal, and corrects the skew between the first to Nth clock signals by performing a phase comparison between the first to Nth clock signals generated based on the first and second clock signals.
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25.
公开(公告)号:US20240142393A1
公开(公告)日:2024-05-02
申请号:US18385068
申请日:2023-10-30
Inventor: Duhgoon Lee , Doil Kim , Junyoung Park , Ibrahim Bechwati
IPC: G01N23/046 , G01N23/083 , H04N25/30
CPC classification number: G01N23/046 , G01N23/083 , H04N25/30 , G01N2223/20 , G01N2223/303 , G01N2223/501
Abstract: A method for calibrating an imaging device comprising a photon counting detector (PCD), the method comprising: providing (i) an X-ray source configured to emit an X-ray beam, (ii) a first detector array configured to be in alignment with the X-ray beam, wherein the first detector array comprises a plurality of energy integrating detectors (EID) for detecting the X-ray beam emitted by the X-ray source, and (iii) a second detector array configured to be in alignment with the X-ray beam, wherein the second detector array comprises a plurality of photo counting detectors (PCD) for detecting the X-ray beam emitted by the X-ray source; detecting an X-ray beam passed through an object to be scanned with the plurality of energy integrating detectors (EID); recording the X-ray beam passed through the object to be scanned and detected by the plurality of energy integrating detectors (EID) as a first data set; detecting an X-ray beam passed through the object to be scanned with the plurality of photo counting detectors (PCD); recording the X-ray beam passed through the object to be scanned and detected by the plurality of photo counting detectors (PCD) as a second data set; generating a mathematical model from the first data set and the second data set so as to derive an attenuation factor; and applying the attenuation factor to the second data set to calibrate the imaging device.
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公开(公告)号:US20230253018A1
公开(公告)日:2023-08-10
申请号:US18134618
申请日:2023-04-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Park , Jaewoo Park , Younghoon Son , Youngdon Choi , Junghwan Choi
CPC classification number: G11C5/147 , G11C7/1063 , G11C7/1069 , G11C7/109 , G11C7/1096 , G11C11/565 , H04L25/028 , H04L25/4917 , G11C2207/101
Abstract: A method of generating a multi-level signal having one of three or more voltage levels that are different from each other, the method including: performing a first voltage setting operation in which first and second voltage intervals are adjusted to be different from each other, wherein the first voltage interval represents a difference between a first pair of adjacent voltage levels and the second voltage interval represents a difference between a second pair of adjacent voltage levels; performing a second voltage setting operation in which a voltage swing width is adjusted, the voltage swing width representing a difference between a lowest and a highest voltage level among the three or more voltage levels; and generating an output data signal that is the multi-level signal based on input data including two or more bits, a result of the first voltage setting operation and a result of the second voltage setting operation.
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公开(公告)号:US11687114B2
公开(公告)日:2023-06-27
申请号:US17145211
申请日:2021-01-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Park , Young-Hoon Son , Hyun-Yoon Cho , Youngdon Choi , Junghwan Choi
IPC: G06F1/06 , G11C11/406 , G11C11/403 , G06F13/40
CPC classification number: G06F1/06 , G06F13/4022 , G11C11/403 , G11C11/40607
Abstract: Disclosed is a clock converting circuit, which includes a first switch that is connected between a first input node for receiving a second input clock and a first node and operates in response to a first logic state of a first input clock, the second input clock delayed with respect to the first input clock as much as 90 degrees, a second switch that is connected between a second input node for receiving the first input clock and a second node and operates in response to a second logic state of the second input clock, and a third switch that is connected between the second node and a ground node and operates in response to a first logic state of the second input clock opposite to the second logic state of the second input clock.
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28.
公开(公告)号:US11160013B2
公开(公告)日:2021-10-26
申请号:US16680712
申请日:2019-11-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jongmu Choi , Heechan Kim , Junyoung Park , Bokun Choi , Hyunah Oh , Seongyu Cho
IPC: H04W48/16 , H04B17/318 , H04M1/724 , H04W84/12 , H04W88/02
Abstract: An electronic device is disclosed herein. The electronic device includes a display, at least one wireless communication circuit configured to perform Wi-Fi wireless communication with at least one access point (AP) and/or at least one external electronic device, a processor operatively connected to the display and the wireless communication circuit, and a memory operatively connected to the processor, wherein the memory stores instructions executable by the processor to cause the electronic device to: execute Wi-Fi scanning and receive a first signal from the at least one AP by the wireless communication circuit, receive a second signal from the at least one external electronic device by the wireless communication circuit, the second signal including information related to the at least one AP, determine a wireless communication channel state of the AP based at least partially on the first signal and the second signal, and control the display to display a graphic user interface (GUI) including an object indicating the determined wireless communication channel state.
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公开(公告)号:US11069115B2
公开(公告)日:2021-07-20
申请号:US16795794
申请日:2020-02-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghwan Seo , Hyejin Kang , Junho An , Minsheok Choi , Yonggyoo Kim , Junyoung Park , Chanhee Yoon , Wooyong Lee , Jonghoon Won
Abstract: An electronic device and method are disclosed. The electronic device includes a camera, a display, and a processor. The processor implements the method, including capturing an image using a camera of the electronic device for animation of an avatar, the image including at least a part of a face of a user, analyzing, by a processor, a portion of the image including the at least the part of the face to determine whether an entirety of the face is captured within the image, and selecting a primary image or an alternative image for display of the avatar based on the determination, including: displaying the avatar on a display of the electronic device using the alternative image when less than the entirety of the face is captured within the image.
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30.
公开(公告)号:US20180249341A1
公开(公告)日:2018-08-30
申请号:US15870254
申请日:2018-01-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Park , Sunkey Lee , Moonsoo Kim , Seonghwan Kim , Kiyeong Jeong , lnsick Jung , Junyeop Jung , Doosuk Kang , Bokun Choi
IPC: H04W16/18 , H04W16/26 , H04B17/318 , H04W24/02 , H04W24/10
CPC classification number: H04W16/18 , H04B17/318 , H04W16/20 , H04W16/26 , H04W24/02 , H04W24/10 , H04W64/003 , H04W84/12
Abstract: A method of determining a location for an access point is provided, which includes positioning an electronic device including a wireless communication circuit at a location separated from a first access point; sensing a signal from the first access point using the electronic device; determining a first value from the sensed signal using the electronic device; converting the first value into a second value using the electronic device; comparing the second value with a threshold value using the electronic device; and determining, by the electronic device, whether the location is suitable for a second access point to be wirelessly linked to the first access point based at least partly on the result of the comparison.
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