公开(公告)号：US20240145006A1

公开(公告)日：2024-05-02

申请号：US18357467

申请日：2023-07-24

Applicant: SanDisk Technologies LLC

Inventor： Peng Zhang ,  Yanli Zhang ,  Dengtao Zhao ,  Jiacen Guo

IPC: G11C16/08 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/08 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3459 ,  H01L25/0657

Abstract: Memory cells of a second sub-block are programmed by pre-charging channels of unselected memory cells connected to the selected word line, boosting the pre-charged channels of unselected memory cells and applying a program voltage to selected non-volatile memory cells connected to the selected word line. The pre-charging includes applying one or more overdrive voltages to word lines connected to memory cells of a first sub-block to provide a conductive path from memory cells of the second sub-block through the first sub-block to a source line and maintaining the word lines connected to memory cells of the first sub-block at one or more overdrive voltages while ramping down signals at the end of the pre-charging. Dummy word lines, positioned between sub-blocks, are maintained at a resting voltage during the boosting in order to cut-off channels of memory cells in the second sub-block from channels of memory cells in the first sub-block.

公开(公告)号：US11894071B2

公开(公告)日：2024-02-06

申请号：US17549457

申请日：2021-12-13

Applicant: SanDisk Technologies LLC

Inventor： Yi Song ,  Dengtao Zhao ,  Sarath Puthenthermadam ,  Jiahui Yuan

IPC: G11C16/28 ,  G11C16/10 ,  G11C7/04 ,  G11C16/26

CPC classification number: G11C16/28 ,  G11C7/04 ,  G11C16/10 ,  G11C16/26

Abstract: A system has been described that performs differential temperature compensation based on a differential between the temperature at time of programming and temperature at time of reading for a set of data. Differential temperature compensation is useful for bulk programming/reading (e.g., many pages of data) and/or programming/reading super pages of data (multiple pages residing on different memory die).

公开(公告)号：US11791001B2

公开(公告)日：2023-10-17

申请号：US17699508

申请日：2022-03-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yi Song ,  Jiahui Yuan ,  Dengtao Zhao

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/28 ,  G11C16/10

CPC classification number: G11C16/3459 ,  G11C16/08 ,  G11C16/102 ,  G11C16/28 ,  G11C16/3404

Abstract: A memory system reads data from non-volatile memory cells using a set of read compare voltages to determine which data state the memory cells are in, where each data state is associated with predetermined data values. The read compare voltages are determined dynamically based on a difference between memory cell current at time of programming and memory cell current at time of reading.

公开(公告)号：US11646081B2

公开(公告)日：2023-05-09

申请号：US17392500

申请日：2021-08-03

Applicant: SanDisk Technologies LLC

Inventor： Xiang Yang ,  Peter Rabkin ,  Henry Chin ,  Ken Oowada ,  Dengtao Zhao ,  Gerrit Jan Hemink

IPC: G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  G11C11/56 ,  H01L27/11565 ,  H01L25/065 ,  H01L27/11582

CPC classification number: G11C16/10 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/349 ,  H01L25/0657 ,  H01L27/11565 ,  H01L27/11582 ,  H01L2225/06562

Abstract: Technology is provided for extending the useful life of a block of memory cells by changing an operating parameter in a physical region of the block that is more susceptible to wear than other regions. Changing the operating parameter in the physical region extends the life of that region, which extends the life of the block. The operating parameter may be, for example, a program voltage step size or a storage capacity of the memory cells. For example, using a smaller program voltage step size in a sub-block that is more susceptible to wear extends the life of that sub-block, which extends the life of the block. For example, programming memory cells to fewer bits per cell in the region of the block (e.g., sub-block, word line) that is more susceptible to wear extends the useful life of that region, which extends the life of the block.

公开(公告)号：US11551765B2

公开(公告)日：2023-01-10

申请号：US17329617

申请日：2021-05-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Xiang Yang ,  Dengtao Zhao

IPC: G11C11/34 ,  G11C16/16 ,  G11C16/26 ,  G11C16/24 ,  G11C16/32 ,  G11C16/30

Abstract: A non-volatile memory system adjusts the speed of a memory operation for a subset of non-volatile memory cells. For example, during a GIDL based erase process, the GIDL generation can be dampened for a subset of memory cells (e.g., for a set of NAND strings, or one or more sub-blocks).

公开(公告)号：US20220399066A1

公开(公告)日：2022-12-15

申请号：US17347772

申请日：2021-06-15

Applicant: SanDisk Technologies LLC

Inventor： Chin-Yi Chen ,  Muhammad Masuduzzaman ,  Dengtao Zhao ,  Anubhav Khandelwal ,  Ravi Kumar

IPC: G11C16/34 ,  G11C16/16 ,  G11C16/28 ,  G11C16/08

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to one of a plurality of word lines and arranged in strings and configured to retain a threshold voltage corresponding to one of a plurality of memory states. A control circuit is coupled to the plurality of word lines and strings and is configured to erase the memory cells using a stripe erase operation in response to determining a cycle count is less than a predetermined cycle count maximum threshold. The control circuit is also configured to perform a dummy cycle operation in response to determining the cycle count is not less than the predetermined cycle count maximum threshold.

公开(公告)号：US20220165341A1

公开(公告)日：2022-05-26

申请号：US17102954

申请日：2020-11-24

Applicant: SanDisk Technologies LLC

Inventor： Xue Bai Pitner ,  Dengtao Zhao ,  Deepanshu Dutta ,  Ravi Kumar

IPC: G11C16/34 ,  G11C16/14 ,  G11C16/26 ,  G11C16/08 ,  G11C16/30

Abstract: A memory apparatus and method of operation is provided. The apparatus includes a block of memory cells. Each of the memory cells is connected to one of a plurality of word lines and are also arranged in strings and configured to retain a threshold voltage within a common range of threshold voltages. A control circuit coupled to the plurality of word lines and the strings is configured to determine an erase upper tail voltage of a distribution of the threshold voltage of the memory cells following an erase operation. The erase upper tail voltage corresponds to a cycling condition of the memory cells. The control circuit is also configured to calculate a program voltage to apply to each of selected ones of the plurality of word lines associated with the memory cells to program the memory cells during a program operation based on the erase upper tail voltage.

公开(公告)号：US11081184B2

公开(公告)日：2021-08-03

申请号：US16701450

申请日：2019-12-03

Applicant: SanDisk Technologies LLC

Inventor： Zhiping Zhang ,  Muhammad Masuduzzaman ,  Huai-Yuan Tseng ,  Dengtao Zhao ,  Deepanshu Dutta

IPC: G11C16/12 ,  G11C16/10 ,  G11C16/26 ,  G11C16/34 ,  G11C16/24 ,  G11C13/00 ,  G11C16/04

Abstract: A method of concurrently programming a memory. Various methods include: applying a non-negative voltage on a first bit line coupled to a first memory cell; applying a negative voltage on a second bit line coupled to a second memory cell, where the negative voltage is generated using triple-well technology; then applying a programming pulse to the first and second memory cells concurrently; and in response, programming the first and second memory cells to different states. The methods also include applying a quick pass write operation to the first and second memory cells, by: applying a quick pass write voltage to the first bit line coupled to the first memory cell, where the quick pass write voltage is higher than the non-negative voltage; applying a negative quick pass write voltage to the second bit line coupled to the first memory cell, where the negative quick pass write voltage is generated using triple-well technology.

公开(公告)号：US20200234778A1

公开(公告)日：2020-07-23

申请号：US16840156

申请日：2020-04-03

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Dengtao Zhao ,  Peng Zhang ,  Nan Lu ,  Deepanshu Dutta

IPC: G11C16/34 ,  G11C16/12 ,  G11C8/08 ,  G11C11/408 ,  G11C16/04

Abstract: Program disturb is a condition that includes the unintended programming of a memory cell while performing a programming process for other memory cells. Such unintended programming can cause an error in the data being stored. In some cases, program disturb can result from electrons trapped in the channel being accelerated from one side of a selected word line to another side of the selected word line and redirected into the selected word line. To prevent such program disturb, it is proposed to open the channel from one side of a selected word line to the other side of the selected word line after a sensing operation for program verify and prior to a subsequent programming voltage being applied.

公开(公告)号：US20200035312A1

公开(公告)日：2020-01-30

申请号：US16047599

申请日：2018-07-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Dengtao Zhao ,  Deepanshu Dutta

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/08 ,  G11C16/04 ,  H01L27/11582

Abstract: Program disturb is a condition that includes the unintended programming while performing a programming process for other memory cells. Such unintended programming can cause an error in the data being stored. In some cases, program disturb can result from electrons trapped in the channel being accelerated from one side of a dummy word line to another side of the dummy word line and redirected into a select gate. To prevent such program disturb, it is proposed to open the channel from one side of the dummy word line to the other side of the dummy word line after a sensing operation for program verify and prior to a subsequent programming voltage being applied. For example, the channel can be opened up by applying a voltage to the dummy word line prior to pre-charging unselected memory cells.