公开(公告)号：US10985109B2

公开(公告)日：2021-04-20

申请号：US16234233

申请日：2018-12-27

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/552 ,  H01L23/31 ,  H01R43/20 ,  H01R43/26 ,  H01R12/79 ,  H01R12/52

Abstract: A semiconductor device has a substrate including a terminal and an insulating layer formed over the terminal. An electrical component is disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the insulating layer over the terminal is exposed from the encapsulant. A shielding layer is formed over the encapsulant and terminal. A portion of the shielding layer is removed to expose the portion of the insulating layer. The portion of the insulating layer is removed to expose the terminal. The portion of the shielding layer and the portion of the insulating layer can be removed by laser ablation.

公开(公告)号：US20200051926A1

公开(公告)日：2020-02-13

申请号：US16529486

申请日：2019-08-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungWon Cho ,  ChangOh Kim ,  Il Kwon Shim ,  InSang Yoon ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/522 ,  H01L23/36 ,  H01L23/00

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US20180294236A1

公开(公告)日：2018-10-11

申请号：US16005387

申请日：2018-06-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC: H01L23/552 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L21/56

Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US20180294235A1

公开(公告)日：2018-10-11

申请号：US16005348

申请日：2018-06-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC: H01L23/552 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L21/56

Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US09997468B2

公开(公告)日：2018-06-12

申请号：US15091049

申请日：2016-04-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/16 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/486 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L25/16 ,  H01L2221/68327 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/01029 ,  H01L2224/81

Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US20240170416A1

公开(公告)日：2024-05-23

申请号：US18429080

申请日：2024-01-31

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi ,  JiWon Lee

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/00 ,  H01L23/28 ,  H01L23/66 ,  H01L25/00 ,  H01L21/60

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/28 ,  H01L23/66 ,  H01L24/94 ,  H01L25/50 ,  H01L2021/60112

Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.

公开(公告)号：US11784133B2

公开(公告)日：2023-10-10

申请号：US17136197

申请日：2020-12-29

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi ,  JiWon Lee

IPC: H01L21/00 ,  H01L23/552 ,  H01L21/311 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/66

CPC classification number: H01L23/552 ,  H01L21/31144 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/66 ,  H01L24/09 ,  H01L24/17

Abstract: A semiconductor device has a substrate. An electrical component is disposed over a surface of the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the surface of the substrate remains exposed from the encapsulant. A shielding layer is formed over the encapsulant. A portion of the shielding layer is removed to expose the portion of the surface of the substrate.

公开(公告)号：US11024585B2

公开(公告)日：2021-06-01

申请号：US16005348

申请日：2018-06-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Byung Joon Han ,  Il Kwon Shim ,  KyoungHee Park ,  Yaojian Lin ,  KyoWang Koo ,  In Sang Yoon ,  SeungYong Chai ,  SungWon Cho ,  SungSoo Kim ,  Hun Teak Lee ,  DeokKyung Yang

IPC: H01L23/552 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16 ,  H01L21/56

Abstract: An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.

公开(公告)号：US20210028122A1

公开(公告)日：2021-01-28

申请号：US17068482

申请日：2020-10-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Dong Won Son ,  Byeonghoon Kim ,  Sung Ho Choi ,  Sung Jae Lim ,  Jong Ho Shin ,  SungWon Cho ,  ChangOh Kim ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US20200373249A1

公开(公告)日：2020-11-26

申请号：US16991370

申请日：2020-08-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh Kim ,  KyoWang Koo ,  SungWon Cho ,  BongWoo Choi ,  JiWon Lee

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/28 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device has a substrate. A first component and second component are disposed over the substrate. The first component includes an antenna. A lid is disposed over the substrate between the first component and second component. An encapsulant is deposited over the substrate and lid. A conductive layer is formed over the encapsulant and in contact with the lid. A first portion of the conductive layer over the first component is removed using laser ablation.