公开(公告)号：US20240203989A1

公开(公告)日：2024-06-20

申请号：US18227064

申请日：2023-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinbum KIM ,  Gyeom KIM ,  Youngkwang KIM ,  Chanyoung KIM ,  Jangwoo PARK ,  Sangmoon LEE ,  Sujin JUNG

IPC: H01L27/092 ,  H01L29/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L27/092 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device includes a substrate including a p-type metal-oxide-semiconductor (MOS) field-effect transistor (FET) (PMOSFET) region and an n-type MOSFET (NMOSFET) region, a first active pattern on the PMOSFET region, a second active pattern on the NMOSFET region, a first channel pattern and a first source/drain pattern on the first active pattern, the first channel pattern connected to the first source/drain pattern, a second channel pattern and a second source/drain pattern provided on the second active pattern, the second channel pattern connected to the second source/drain pattern, and a gate electrode on the first channel pattern and the second channel pattern.

公开(公告)号：US20230326985A1

公开(公告)日：2023-10-12

申请号：US18201308

申请日：2023-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ryong HA ,  Dongwoo KIM ,  Gyeom KIM ,  Yong Seung KIM ,  Pankwi PARK ,  Seung Hun LEE

IPC: H01L29/423 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/41758 ,  H01L29/1033 ,  H01L29/42356

Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.

公开(公告)号：US20220069134A1

公开(公告)日：2022-03-03

申请号：US17206229

申请日：2021-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongwoo KIM ,  Jinbum KIM ,  Gyeom KIM ,  Dohee KIM ,  Seunghun LEE

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/161 ,  H01L29/423 ,  H01L29/417 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device including an active region extending in a first direction on a substrate; channel layers vertically spaced apart on the active region; a gate structure extending in a second direction and intersecting the active region, the gate structure surrounding the channel layers; a source/drain region on the active region in contact with the channel layers; and a contact plug connected to the source/drain region, wherein the source/drain region includes a first epitaxial layer on side surfaces of the channel layers and including a first impurity; a second epitaxial layer on the first epitaxial layer and including the first impurity and a second impurity; and a third epitaxial layer on the second epitaxial layer and including the first impurity, and in a horizontal sectional view, the second epitaxial layer includes a peripheral portion having a thickness in the first direction that increases along the second direction.

公开(公告)号：US20210098626A1

公开(公告)日：2021-04-01

申请号：US16910819

申请日：2020-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum KIM ,  Gyeom KIM ,  Da Hye KIM ,  Jae Mun KIM ,  Il Gyou SHIN ,  Seung Hun LEE ,  Kyung In CHOI

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

公开(公告)号：US20180130886A1

公开(公告)日：2018-05-10

申请号：US15685255

申请日：2017-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum KIM ,  Gyeom KIM ,  Seok Hoon KIM ,  Tae Jin PARK ,  Jeong Ho YOO ,  Cho Eun LEE ,  Hyun Jung LEE ,  Sun Jung KIM ,  Dong Suk SHIN

IPC: H01L29/417 ,  H01L27/092 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3205

CPC classification number: H01L29/41725 ,  H01L21/02425 ,  H01L21/32053 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/42356 ,  H01L29/517 ,  H01L2924/0002

Abstract: A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.

公开(公告)号：US20160372567A1

公开(公告)日：2016-12-22

申请号：US15134906

申请日：2016-04-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Suk TAK ,  Gyeom KIM ,  Ki-Yeon PARK ,  Sung-Hyun CHOI ,  Bon-Young KOO

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/165 ,  H01L29/08 ,  H01L29/78 ,  H01L29/161

CPC classification number: H01L29/6656 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate including an active fin structure, a plurality of gate structures, a first spacer on sidewalls of each of the gate structures, and a second spacer on sidewalls of the first spacer. The active fin structure may extend in a first direction and including a plurality of active fins with adjacent active fins divided by a recess. Each of the plurality of gate structures may extend in a second direction crossing the first direction, and may cover the active fins. The first spacer may include silicon oxycarbonitride (SiOCN), and may have a first carbon concentration. The second spacer may include SiOCN and may have a second carbon concentration which is different from the first carbon concentration. The semiconductor device may have a low parasitic capacitance and good electrical characteristics.

Abstract translation: 半导体器件包括：衬底，其包括有源鳍结构，多个栅极结构，每个栅极结构的侧壁上的第一间隔物，以及在第一间隔物的侧壁上的第二间隔物。 主动翅片结构可以在第一方向上延伸并且包括多个活动翅片，相邻的活动翅片由凹部分开。 多个栅极结构中的每一个可以在与第一方向交叉的第二方向上延伸，并且可以覆盖活动鳍片。 第一间隔物可以包括硅碳氮氧化物（SiOCN），并且可以具有第一碳浓度。 第二间隔物可以包括SiOCN，并且可以具有不同于第一碳浓度的第二碳浓度。 半导体器件可以具有低寄生电容和良好的电特性。