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公开(公告)号:US20150121630A1
公开(公告)日:2015-05-07
申请号:US14300789
申请日:2014-06-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung Mo LEE , Jun Hyun PARK , Seung Hun LEE , Jung Won CHOI
CPC classification number: D06F37/306 , D06F17/06 , D06F33/02 , D06F39/003 , D06F2202/085 , D06F2202/10 , D06F2202/12 , D06F2204/06 , D06F2204/065 , D06F2204/086
Abstract: A washing machine capable of performing washing by increasing a water level when an overload of a motor is detected, and a control method thereof. The washing is performed by detecting an overload of the motor using a load detecting circuit and changing a water level to a highest water level when the overload is detected. Thus, a burning smell may not be caused from the motor by preventing stalling of the motor, and washing performance may be maintained since the motor is continuously operated without stopping.
Abstract translation: 一种能够在检测到电动机的过载时通过增加水位来进行洗涤的洗衣机及其控制方法。 通过使用负载检测电路检测电动机的过载并且当检测到过载时将水位改变到最高水位来进行洗涤。 因此,通过防止电动机的失速,可能不会从电动机引起燃烧的气味,并且可以保持电动机在不停止的情况下连续操作时的洗涤性能。
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公开(公告)号:US20150061560A1
公开(公告)日:2015-03-05
申请号:US14465892
申请日:2014-08-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seung Hun LEE , Sung Mo LEE , Jung Won CHOI
CPC classification number: D06F33/02 , D06F17/08 , D06F37/40 , D06F2202/065 , D06F2204/065 , H02P6/08 , H02P6/17 , H02P21/22 , H02P29/024 , H02P29/0241
Abstract: A washing machine and a control method thereof capable of determining whether a driving motor is locked. A pulsator is rotatably mounted in a spin basket, a driving motor generates rotational force, a clutch transmits the rotational force to the pulsator or the spin basket, a driving circuit supplies a driving current to the driving motor, and a control unit controls the driving circuit and the clutch so that the pulsator rotates in a forward or reverse direction and rotation of the spin basket is stopped in a washing or rinsing process. The control unit controls the driving circuit so that a motor lock detection current is supplied to the driving motor, and controls the clutch so that, if a rotating speed of the driving motor is less than a reference speed, the rotational force is transmitted only to the pulsator.
Abstract translation: 一种能够确定驱动电机是否被锁定的洗衣机及其控制方法。 波轮可旋转地安装在旋转筐中,驱动电机产生旋转力,离合器将旋转力传递到脉动器或旋转筐,驱动电路向驱动电机提供驱动电流,控制单元控制驱动 电路和离合器,使得波轮在正向或反向方向上旋转,并且旋转筒的旋转在洗涤或漂洗过程中停止。 控制单元控制驱动电路,使得马达锁定检测电流被提供给驱动马达,并且控制离合器使得如果驱动马达的转速小于参考速度,则旋转力仅传递到 脉动器。
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公开(公告)号:US20210217860A1
公开(公告)日:2021-07-15
申请号:US17141513
申请日:2021-01-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ryong HA , Dongwoo KIM , Gyeom KIM , Yong Seung KIM , Pankwi PARK , Seung Hun LEE
IPC: H01L29/417 , H01L29/10 , H01L29/423
Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
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公开(公告)号:US20210143049A1
公开(公告)日:2021-05-13
申请号:US17137485
申请日:2020-12-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunguk Jang , Seokhoon KIM , Seung Hun LEE , Yang XU , Jeongho YOO , Jongryeol YOO , Youngdae CHO
IPC: H01L21/762 , H01L21/225 , H01L29/423 , H01L21/02 , H01L29/66 , H01L29/165 , H01L29/78
Abstract: Semiconductor devices and methods of forming the same are provided. The methods may implanting dopants into a substrate to form a preliminary impurity region and heating the substrate to convert the preliminary impurity region into an impurity region. Heating the substrate may be performed at an ambient temperature of from about 800° C. to about 950° C. for from about 20 min to about 50 min. The method may also include forming first and second trenches in the impurity region to define an active fin and forming a first isolation layer and a second isolation layer in the first and second trenches, respectively. The first and second isolation layers may expose opposing sides of the active fin. The method may further include forming a gate insulation layer extending on the opposing sides and an upper surface of the active fin and forming a gate electrode traversing the active fin
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公开(公告)号:US20200349000A1
公开(公告)日:2020-11-05
申请号:US16934788
申请日:2020-07-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hui Chung BYUN , Yoen Hwa LEE , Seung Hun LEE
Abstract: A memory device includes a plurality of memory chips storing and outputting data in response to a control command and an address command, at least one ECC memory chip providing an error check and correction (ECC) function on the data stored and output by the plurality of the memory chips, and a controller, marking a memory chip in which a defective memory cell is detected among the plurality of memory chips, as a defective memory chip, storing data of the defective memory chip in the ECC memory chip, and controlling the defective memory chip to execute a post package repair (PPR).
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公开(公告)号:US20200328290A1
公开(公告)日:2020-10-15
申请号:US16686378
申请日:2019-11-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: HYUN KWAN YU , Seung Hun LEE , Yang XU
IPC: H01L29/66 , H01L29/20 , H01L29/201 , H01L29/165
Abstract: A method of manufacturing a semiconductor device, the method including: forming, in a first region of a substrate, an active fin and a sacrificial gate structure intersecting the active fin; forming a first spacer and a second spacer on the substrate to cover the sacrificial gate structure; forming a mask in a second region of the substrate to expose the first region of the substrate; removing the second spacer from the first spacer in the first region of the substrate by using the mask; forming recesses at opposite sides of the sacrificial gate structure by removing portions of the active fin; forming a source and a drain in the recesses; and forming an etch-stop layer to cover both sidewalls of the sacrificial gate structure and a top surfaces of the source and drain.
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公开(公告)号:US20190288065A1
公开(公告)日:2019-09-19
申请号:US15992401
申请日:2018-05-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Namkyu Edward CHO , Seung Soo HONG , Geum Jung SEONG , Seung Hun LEE , Jeong Yun LEE
IPC: H01L29/08 , H01L27/092 , H01L29/06 , H01L27/02 , H01L21/8238 , H01L21/311 , H01L21/306 , H01L27/11 , H01L21/02 , H01L29/165 , H01L29/78
Abstract: A semiconductor device includes fin patterns on a substrate, at least one gate electrode intersecting the fin patterns, source/drain regions on upper surfaces of the fin patterns, and at least one blocking layer on a sidewall of a first fin pattern of the fin patterns, the at least one blocking layer extending above an upper surface of the first fin pattern of the fin patterns, wherein a first source/drain region of the source/drain regions that is on the upper surface of the first fin pattern has an asymmetric shape and is in direct contact with the at least one blocking layer.
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公开(公告)号:US20180138269A1
公开(公告)日:2018-05-17
申请号:US15715832
申请日:2017-09-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seok Hoon KIM , Hyun Jung LEE , Kyung Hee KIM , Sun Jung KIM , Jin Bum KIM , Il Gyou SHIN , Seung Hun LEE , Cho Eun LEE , Dong Suk SHIN
IPC: H01L29/08 , H01L29/78 , H01L29/161 , H01L29/167 , H01L29/66 , H01L21/02
CPC classification number: H01L29/0847 , H01L21/02532 , H01L21/0257 , H01L29/161 , H01L29/165 , H01L29/167 , H01L29/66545 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785 , H01L29/7851
Abstract: There is provided a semiconductor device capable of enhancing short channel effect by forming a carbon-containing semiconductor pattern in a source/drain region. The semiconductor device includes a first gate electrode and a second gate electrode spaced apart from each other on a fin-type pattern, a recess formed in the fin-type pattern between the first gate electrode and the second gate electrode, and a semiconductor pattern including a lower semiconductor film formed along a profile of the recess and an upper semiconductor film on the lower semiconductor film, wherein the lower semiconductor film includes a lower epitaxial layer and an upper epitaxial layer sequentially formed on the fin-type pattern, and a carbon concentration of the upper epitaxial layer is greater than a carbon concentration of the lower epitaxial layer.
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公开(公告)号:US20170222006A1
公开(公告)日:2017-08-03
申请号:US15298746
申请日:2016-10-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dong Chan SUH , Yong Suk TAK , Gi Gwan PARK , Mi Seon PARK , Moon Seung YANG , Seung Hun LEE , Poren TANG
IPC: H01L29/423 , H01L29/78 , H01L23/528
CPC classification number: H01L29/42376 , H01L23/5283 , H01L29/0673 , H01L29/0847 , H01L29/42364 , H01L29/66439 , H01L29/7831
Abstract: A semiconductor device includes at least a first wire pattern, a gate electrode, a semiconductor pattern, a gate insulating layer, and a first spacer. The first wire pattern is on a substrate and isolated from the substrate. The gate electrode surrounds and intersects the first wire pattern. The semiconductor pattern is on both sides of the first wire pattern, and the semiconductor pattern includes a portion which overlaps the first wire pattern. The gate insulating layer is disposed between the gate electrode and the first wire pattern, and the gate insulating layer surrounds the first wire pattern. The first spacer is between the first wire pattern and the substrate, and the first spacer is between the gate insulating layer and the semiconductor pattern
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公开(公告)号:US20230207628A1
公开(公告)日:2023-06-29
申请号:US18115913
申请日:2023-03-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Namkyu Edward CHO , Seung Soo HONG , Geum Jung SEONG , Seung Hun LEE , Jeong Yun LEE
IPC: H01L29/08 , H01L21/02 , H01L29/06 , H01L27/02 , H01L21/8238 , H01L21/311 , H01L21/306 , H01L29/165 , H01L29/78 , H01L27/092 , H10B10/00
CPC classification number: H01L29/0847 , H01L21/02576 , H01L29/0649 , H01L27/0207 , H01L21/823821 , H01L21/823828 , H01L21/31111 , H01L21/823814 , H01L21/30604 , H01L21/02532 , H01L21/02636 , H01L29/165 , H01L29/7848 , H01L21/02579 , H01L27/0924 , H01L29/0869 , H10B10/12
Abstract: A semiconductor device includes fin patterns on a substrate, at least one gate electrode intersecting the fin patterns, source/drain regions on upper surfaces of the fin patterns, and at least one blocking layer on a sidewall of a first fin pattern of the fin patterns, the at least one blocking layer extending above an upper surface of the first fin pattern of the fin patterns, wherein a first source/drain region of the source/drain regions that is on the upper surface of the first fin pattern has an asymmetric shape and is in direct contact with the at least one blocking layer.
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