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公开(公告)号:US20220399355A1
公开(公告)日:2022-12-15
申请号:US17776342
申请日:2020-11-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazuki TSUDA , Hiromichi GODO , Satoru OHSHITA , Hitoshi KUNITAKE
IPC: H01L27/11524 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11582
Abstract: A novel semiconductor device is provided. A structure body extending in a first direction, a first conductor extending in a second direction, and a second conductor extending in the second direction are provided. In a first intersection portion where the structure body and the first conductor intersect with each other, a first insulator, a first semiconductor, a second insulator, a second semiconductor, a third insulator, a fourth insulator, and a fifth insulator are provided concentrically around a third conductor. In a second intersection portion where the structure body and the second conductor intersect with each other, the first insulator, the first semiconductor, the second insulator, a fourth conductor, the second semiconductor, and the third insulator are provided concentrically around the third conductor.
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公开(公告)号:US20220352384A1
公开(公告)日:2022-11-03
申请号:US17760836
申请日:2020-09-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi OOTA , Yoshinori ANDO , Shuhei NAGATSUKA , Tatsuki KOSHIDA , Satoru OHSHITA , Ryota HODO , Kazuki TSUDA , Akio SUZUKI
IPC: H01L29/786 , H01L27/108 , H01L29/66
Abstract: A semiconductor device that is suitable for high integration is provided. A first layer provided with a first transistor including an oxide semiconductor, over a substrate; a second layer over the first layer; a third layer provided with a second transistor including an oxide semiconductor, over the second layer; a fourth layer between the first layer and the second layer; and a fifth layer between the second layer and the third layer are included. The total internal stress of the first layer and the total internal stress of the third layer act in a first direction, the total internal stress of the second layer acts in the direction opposite to the first direction, and the fourth layer and the fifth layer each include a film having a barrier property.
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公开(公告)号:US20240298447A1
公开(公告)日:2024-09-05
申请号:US18658092
申请日:2024-05-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiromichi GODO , Hitoshi KUNITAKE , Kazuki TSUDA
CPC classification number: H10B43/27 , G11C16/0483 , G11C16/08 , H10B41/27
Abstract: A novel semiconductor device is provided. A memory string, which extends in the Z direction and includes a conductor and an oxide semiconductor, intersects with a plurality of wirings CG extending in the Y direction. The conductor is placed along a center axis of the memory string, and the oxide semiconductor is concentrically placed outside the conductor. The conductor is electrically connected to the oxide semiconductor. An intersection portion of the memory string and the wiring CG functions as a transistor. In addition, the intersection portion functions as a memory cell.
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公开(公告)号:US20240256037A1
公开(公告)日:2024-08-01
申请号:US18594319
申请日:2024-03-04
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yoshiyuki KUROKAWA , Hiromichi GODO , Kouhei TOYOTAKA , Kazuki TSUDA , Satoru OHSHITA , Hidefumi RIKIMARU
IPC: G06F3/01 , G02B27/01 , G09G3/00 , G09G3/3225 , H01L27/12 , H01L29/786 , H10K59/121
CPC classification number: G06F3/013 , G02B27/0172 , G09G3/002 , G09G3/3225 , H10K59/1213 , G02B2027/0178 , G09G2354/00 , G09G2360/14 , H01L27/1225 , H01L27/1251 , H01L27/1255 , H01L29/78648 , H01L29/78651 , H01L29/7869
Abstract: To provide a novel electronic device. The electronic device includes a housing and a display device. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and an arithmetic circuit. The second layer includes pixel circuits and a cell array. The third layer includes light-receiving devices and light-emitting devices. The pixel circuits each have a function of controlling light emission of the light-emitting device. The driver circuit has a function of controlling the pixel circuits. The arithmetic circuit has a function of performing arithmetic processing on the basis of first data corresponding to currents output from the light-receiving devices and second data corresponding to a potential held in the cell array.
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公开(公告)号:US20230386544A1
公开(公告)日:2023-11-30
申请号:US18245098
申请日:2021-09-07
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiromichi GODO , Yoshiyuki KUROKAWA , Kazuki TSUDA , Satoru OHSHITA
CPC classification number: G11C11/223 , G11C11/221 , G11C11/2297 , H10B53/30 , H10B51/30 , H01L29/40111 , H01L29/78391
Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first gate and a first back gate, and the second transistor includes a second gate and a second back gate. A gate insulating layer for the first back gate has ferroelectricity. The first transistor has a function of, when being in an off state, retaining a first potential corresponding to first data. The second transistor has a function of making an output current flow between a source and a drain of the second transistor.
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公开(公告)号:US20230284429A1
公开(公告)日:2023-09-07
申请号:US18016745
申请日:2021-07-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiromichi GODO , Kazuki TSUDA , Yoshiyuki KUROKAWA , Satoru OHSHITA , Takuro KANEMURA , Hidefumi RIKIMARU
IPC: H10B12/00 , G11C11/405 , G11C11/54
CPC classification number: H10B12/00 , G11C11/405 , G11C11/54
Abstract: Provided is a semiconductor device having a novel structure. A first transistor, a second transistor, a third transistor, and a capacitor are included. The first transistor has a function of retaining a first potential corresponding to first data supplied to a gate of the third transistor through the first transistor when being in an off state. The capacitor has a function of changing the first potential retained in the gate of the third transistor into a second potential in accordance with a change in potential corresponding to second data supplied to one electrode of the capacitor. The second transistor has a function of setting a potential of one of a source and a drain of the third transistor to a potential corresponding to a potential of a gate of the second transistor. The third transistor has a function of supplying output current corresponding to a potential of the gate of the third transistor to the other of the source and the drain of the third transistor. The output current is current flowing when the third transistor operates in a subthreshold region.
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公开(公告)号:US20230273637A1
公开(公告)日:2023-08-31
申请号:US18024198
申请日:2021-08-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiyuki KUROKAWA , Kazuki TSUDA , Hiromichi GODO , Satoru OHSHITA , Takuro KANEMURA , Hidefumi RIKIMARU , Takayuki IKEDA , Yuto YAKUBO , Shunpei YAMAZAKI
CPC classification number: G05F3/24 , H01M10/425
Abstract: A control circuit of a secondary battery with a novel structure is provided. The control circuit of a secondary battery includes a first transistor, a first voltage generation circuit generating a first voltage, and a second voltage generation circuit generating a second voltage. The first voltage generation circuit includes a second transistor and a first capacitor. The second voltage generation circuit includes a third transistor and a second capacitor. The difference between the first voltage and the second voltage is set in accordance with the threshold voltage of the first transistor. When the first transistor includes a back gate, a voltage retention circuit having a function of retaining the voltage of the back gate is included. The voltage retention circuit includes a fourth transistor and a third capacitor. The third capacitor includes a ferroelectric layer between a pair of electrodes. The third capacitor retains a voltage applied to the back gate by being applied with a voltage for polarization inversion in the ferroelectric layer.
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公开(公告)号:US20220262858A1
公开(公告)日:2022-08-18
申请号:US17629804
申请日:2020-07-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hajime KIMURA , Takanori MATSUZAKI , Tatsuya ONUKI , Yuki OKAMOTO , Hideki UOCHI , Satoru OKAMOTO , Hiromichi GODO , Kazuki TSUDA , Hitoshi KUNITAKE
IPC: H01L27/24
Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.
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公开(公告)号:US20180047946A1
公开(公告)日:2018-02-15
申请号:US15670318
申请日:2017-08-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazuki TSUDA , Kohei YOKOYAMA , Yasuhiro JINBO
IPC: H01L51/56 , H01L27/12 , G02F1/1368
CPC classification number: H01L51/56 , G02F1/1368 , H01L27/1214 , H01L27/322 , H01L27/3232 , H01L29/66007 , H01L51/5253
Abstract: A highly reliable display device or electronic device is provided. The display device includes a first electrode, a second electrode, a light-emitting layer between the first electrode and the second electrode, and a protective film over the second electrode. The protective film includes a first insulating film and a second insulating film over the first insulating film. The first insulating film includes one or more of aluminum oxide, hafnium oxide, and zirconium oxide, and the second insulating film includes one or more of aluminum oxide, hafnium oxide, and zirconium oxide. A composition of the first insulating film is different from a composition of the second insulating film. A water vapor transmission rate of the protective film is lower than 1×10−2 g/(m2·day).
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