公开(公告)号：US09748403B2

公开(公告)日：2017-08-29

申请号：US15160059

申请日：2016-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/04 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: The reliability of a transistor including an oxide semiconductor is improved. The transistor in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region overlapping with the second oxide semiconductor film, a source region and a drain region each in contact with the second insulating film. The channel region includes a first layer and a second layer in contact with a top surface of the first layer and covering a side surface of the first layer in the channel width direction. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

公开(公告)号：US09640555B2

公开(公告)日：2017-05-02

申请号：US14733052

申请日：2015-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi Okazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Takahiro Iguchi

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L27/1225 ,  H01L29/513 ,  H01L29/66969 ,  H01L29/7869

Abstract: A change in electrical characteristics can be inhibited and reliability can be improved in a semiconductor device including an oxide semiconductor. The semiconductor device including an oxide semiconductor film includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, and a third insulating film over the second insulating film. The second insulating film includes oxygen and silicon, the third insulating film includes nitrogen and silicon, and indium is included in a vicinity of an interface between the second insulating film and the third insulating film.

公开(公告)号：US09634150B2

公开(公告)日：2017-04-25

申请号：US14639427

申请日：2015-03-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Masami Jintyou

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/423 ,  H01L29/24 ,  H01L27/12 ,  H01L27/32

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

Abstract: A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.

公开(公告)号：US09634031B2

公开(公告)日：2017-04-25

申请号：US14741840

申请日：2015-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Toshimitsu Obonai ,  Junichi Koezuka ,  Suzunosuke Hiraishi

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L27/1225 ,  H01L21/385 ,  H01L21/441 ,  H01L21/47573 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A semiconductor device includes a transistor including a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, and a pair of electrodes. The gate electrode and the oxide semiconductor film overlap with each other. The oxide semiconductor film is located between the first insulating film and the second insulating film and in contact with the pair of electrodes. The first insulating film is located between the gate electrode and the oxide semiconductor film. An etching rate of a region of at least one of the first insulating film and the second insulating film is higher than 8 nm/min when etching is performed using a hydrofluoric acid.

公开(公告)号：US09530894B2

公开(公告)日：2016-12-27

申请号：US14615031

申请日：2015-02-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Daisuke Kurosaki ,  Masataka Nakada ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L29/78603 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

Abstract translation: 提供了包括其中导通电流高的氧化物半导体的半导体器件。 该半导体器件包括设置在驱动电路部分中的第一晶体管和设置在像素部分中的第二晶体管; 第一晶体管和第二晶体管具有不同的结构。 此外，第一晶体管和第二晶体管是具有顶栅结构的晶体管。 在每个晶体管的氧化物半导体膜中，杂质元素包含在不与栅电极重叠的区域中。 含有杂质元素的氧化物半导体膜的区域用作低电阻区域。 此外，含有杂质元素的氧化物半导体膜的区域与含有氢的膜接触。 设置在驱动电路部分的第一晶体管包括设置氧化物半导体膜的两个栅电极。

公开(公告)号：US09252248B2

公开(公告)日：2016-02-02

申请号：US14682376

申请日：2015-04-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Yamato Aihara ,  Katsuaki Tochibayashi ,  Toru Arakawa

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/45 ,  H01L29/786 ,  H01L21/441 ,  H01L21/4757 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/66969 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/47573 ,  H01L29/045 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.

Abstract translation: 本发明的目的是提供一种制造包括高性能和高可靠性晶体管的半导体器件的技术。 在氧化物半导体层和导电层之间形成由导电层形成布线层时保护氧化物半导体层的保护导电膜，并且进行具有两个步骤的蚀刻工艺。 在第一蚀刻步骤中，在保护导电膜比导电层蚀刻少的条件下进行蚀刻，并且导电层对保护导电膜的蚀刻选择性高。 在第二蚀刻步骤中，在保护导电膜比氧化物半导体层更容易蚀刻的条件下进行蚀刻，并且保护性导电膜对氧化物半导体层的蚀刻选择性高。

公开(公告)号：US09171803B2

公开(公告)日：2015-10-27

申请号：US14306862

申请日：2014-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takahiro Iguchi

IPC: H01L29/15 ,  H01L23/532 ,  H01L21/768 ,  H01L29/786 ,  H01L51/00 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: H01L21/76829 ,  G02F1/133345 ,  G02F1/136204 ,  G02F2001/136295 ,  G02F2201/50 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/1225 ,  H01L27/1262 ,  H01L27/3272 ,  H01L29/458 ,  H01L29/786 ,  H01L29/7869 ,  H01L51/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a semiconductor device including a pair of electrodes electrically connected to a semiconductor layer which has a stacked-layer structure including a first protective layer in contact with the semiconductor layer and a conductive layer containing the low-resistance material and being over and in contact with the first protective layer. The top surface of the conductive layer is covered with a second protective layer functioning as a mask for processing the conductive layer. The side surface of the conductive layer is covered with a third protective layer. With this structure, entry or diffusion of the constituent element of the pair of conductive layers containing the low-resistance material into the semiconductor layer is suppressed.

Abstract translation: 为了提高包括诸如铜，铝，金或银的低电阻材料的半导体器件作为布线的可靠性。 提供一种半导体器件，其包括电连接到半导体层的一对电极，所述半导体层具有层叠结构，所述层叠结构包括与半导体层接触的第一保护层和包含低电阻材料的导电层并且接触 与第一保护层。 导电层的顶表面覆盖有用作处理导电层的掩模的第二保护层。 导电层的侧表面被第三保护层覆盖。 通过这种结构，抑制了含有低电阻材料的一对导电层的构成元素进入或扩散到半导体层中。

公开(公告)号：US20150255612A1

公开(公告)日：2015-09-10

申请号：US14639427

申请日：2015-03-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Masami Jintyou

IPC: H01L29/786 ,  H01L27/32 ,  H01L27/12 ,  H01L29/49 ,  H01L29/24 ,  H01L29/36 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78696

Abstract: A self-aligned transistor including an oxide semiconductor film, which has excellent and stable electrical characteristics, is provided. A semiconductor device is provided with a transistor that includes an oxide semiconductor film, a gate electrode overlapping with part of the oxide semiconductor film, and a gate insulating film between the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a first region and second regions between which the first region is positioned. The second regions include an impurity element. A side of the gate insulating film has a depressed region. Part of the gate electrode overlaps with parts of the second regions in the oxide semiconductor film.

Abstract translation: 提供了具有优异且稳定的电气特性的包含氧化物半导体膜的自对准晶体管。 半导体器件具有晶体管，该晶体管包括氧化物半导体膜，与氧化物半导体膜的一部分重叠的栅电极以及氧化物半导体膜与栅电极之间的栅极绝缘膜。 氧化物半导体膜包括第一区域和第一区域，第一区域和第二区域之间位于第一区域之间。 第二区域包括杂质元素。 栅极绝缘膜的一侧具有凹陷区域。 栅电极的一部分与氧化物半导体膜中的第二区域的一部分重叠。

公开(公告)号：US20150187953A1

公开(公告)日：2015-07-02

申请号：US14582273

申请日：2014-12-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Takashi Hamochi ,  Yasutaka Nakazawa ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/417 ,  H01L27/12 ,  H01L29/40 ,  H01L29/04

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/7869 ,  H01L2029/7863

Abstract: A novel semiconductor device including an oxide semiconductor is provided. In particular, a planar semiconductor device including an oxide semiconductor is provided. A semiconductor device including an oxide semiconductor and having large on-state current is provided. The semiconductor device includes an oxide insulating film, an oxide semiconductor film over the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping the oxide semiconductor film with the gate insulating film. The oxide semiconductor film includes a first region overlapped with the gate electrode and a second region not overlapped with the gate electrode, the source electrode, and the drain electrode. The first region and the second region have different impurity element concentrations. The gate electrode, the source electrode, and the drain electrode contain the same metal element.

Abstract translation: 提供了包括氧化物半导体的新型半导体器件。 特别地，提供了包括氧化物半导体的平面半导体器件。 提供包括氧化物半导体并具有大导通电流的半导体器件。 半导体器件包括氧化物绝缘膜，氧化物绝缘膜上的氧化物半导体膜，与氧化物半导体膜接触的源极和漏电极，源极和漏极之间的栅极绝缘膜，以及栅极 电极与氧化物半导体膜与栅极绝缘膜重叠。 氧化物半导体膜包括与栅电极重叠的第一区域和不与栅电极，源电极和漏电极重叠的第二区域。 第一区和第二区具有不同的杂质元素浓度。 栅电极，源电极和漏电极含有相同的金属元素。

公开(公告)号：US12218144B2

公开(公告)日：2025-02-04

申请号：US18531767

申请日：2023-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Yasutaka Nakazawa ,  Yukinori Shima ,  Masami Jintyou ,  Masayuki Sakakura ,  Motoki Nakashima

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L29/04

Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.