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    Semiconductor integrated circuit device and process for manufacturing the same
    21.
    发明授权
    Semiconductor integrated circuit device and process for manufacturing the same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号：US07910427B1

    公开(公告)日：2011-03-22

    申请号：US12895357

    申请日：2010-09-30

    申请人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    发明人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    IPC分类号： H01L21/8234 ,  H01L29/00

    CPC分类号： H01L27/11 ,  G11C11/412 ,  G11C11/4125 ,  H01L21/76895 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/1104 ,  Y10S257/904

    摘要： A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.

    摘要翻译： 一种完整的CMOS型SRAM，其存储单元由六个MISFET组成，其中一对用于连接CMOS反相器的输入/输出端的局部布线由难熔金属硅化物层形成，该难熔金属硅化物层形成在构成个体的第一导电层上 存储单元的驱动MISFET，转移MISFET和负载MISFET的栅极电极，其中形成在局部布线上的参考电压线被布置成叠加在局部布线上以形成电容元件。 此外，通过在第一导电层上叠加局部布线，在局部布线和第一导电层之间形成电容元件。 此外，通过使用诸如硅化的电阻降低装置形成局部布线。 此外，公开了用于降低转移MISFET的栅电极的电阻和用于形成局部布线的装置的手段。

    Semiconductor integrated circuit device and process for manufacturing the same
    23.
    发明授权
    Semiconductor integrated circuit device and process for manufacturing the same 失效
    半导体集成电路器件及其制造方法

    公开(公告)号：US06809399B2

    公开(公告)日：2004-10-26

    申请号：US10304045

    申请日：2002-11-26

    申请人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    发明人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    IPC分类号： H01L218234

    CPC分类号： H01L27/11 ,  G11C11/412 ,  G11C11/4125 ,  H01L21/76895 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/1104 ,  Y10S257/904

    摘要： A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover, the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.

    摘要翻译： 一种完整的CMOS型SRAM，其存储单元由六个MISFET组成，其中一对用于连接CMOS反相器的输入/输出端的局部布线由难熔金属硅化物层形成，该难熔金属硅化物层形成在构成个体的第一导电层上 存储器单元的驱动MISFET，传输MISFET和负载MISFET的栅电极，其中形成在局部布线上的参考电压线被布置成叠加在局部布线上以形成电容元件。此外， 通过在第一导电层上叠置局部布线，在局部布线和第一导电层之间形成电容元件。此外，通过使用诸如硅化的电阻降低装置形成局部布线。 此外，公开了用于降低转移MISFET的栅电极的电阻和用于形成局部布线的装置的手段。

    Semiconductor integrated circuit device and process for manufacturing the same
    24.
    发明授权
    Semiconductor integrated circuit device and process for manufacturing the same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号：US06548885B2

    公开(公告)日：2003-04-15

    申请号：US09755184

    申请日：2001-01-08

    申请人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    发明人： Shuji Ikeda ,  Toshiaki Yamanaka ,  Kenichi Kikushima ,  Shinichiro Mitani ,  Kazushige Sato ,  Akira Fukami ,  Masaya Iida ,  Akihiro Shimizu

    IPC分类号： H01L2900

    CPC分类号： H01L27/11 ,  G11C11/412 ,  G11C11/4125 ,  H01L21/76895 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/1104 ,  Y10S257/904

    摘要： A SRAM of complete CMOS type having its memory cell composed of six MISFETs, in which a pair of local wiring lines for connecting the input/output terminals of CMOS inverters are formed of a refractory metal silicide layer formed over a first conducting layer constituting the individual gate electrodes of the drive MISFETs, the transfer MISFETs and the load MISFETs of the memory cell and in which a reference voltage line formed over the local wiring lines is arranged to be superposed over the local wiring lines to form a capacity element. Moreover, the capacity element is formed between the local wiring lines and the first conducting layer by superposing the local wiring lines over the first conducting layer. Moreover the local wiring lines are formed by using resistance lowering means such as silicification. In addition, there are made common the means for lowering the resistance of the gate electrode of the transfer MISFETs and the means for forming the local wiring lines.

    摘要翻译： 一种完整的CMOS型SRAM，其存储单元由六个MISFET组成，其中一对用于连接CMOS反相器的输入/输出端的局部布线由难熔金属硅化物层形成，该难熔金属硅化物层形成在构成个体的第一导电层上 存储单元的驱动MISFET，转移MISFET和负载MISFET的栅极电极，其中形成在局部布线上的参考电压线被布置成叠加在局部布线上以形成电容元件。 此外，通过在第一导电层上叠加局部布线，在局部布线和第一导电层之间形成电容元件。 此外，通过使用诸如硅化的电阻降低装置来形成局部布线。 此外，公开了用于降低转移MISFET的栅电极的电阻和用于形成局部布线的装置的手段。

    Dual-function car spoiler
    28.
    发明授权
    Dual-function car spoiler 失效
    双功能汽车扰流板

    公开(公告)号：US4678118A

    公开(公告)日：1987-07-07

    申请号：US640986

    申请日：1984-08-15

    申请人： Akira Fukami ,  Takao Oshiro ,  Hideaki Sasaya

    发明人： Akira Fukami ,  Takao Oshiro ,  Hideaki Sasaya

    IPC分类号： B60H1/00 ,  B62D35/00 ,  F01P11/00 ,  F01P11/10 ,  F01P11/20 ,  B60H1/02

    CPC分类号： F01P11/00 ,  B60H1/00492 ,  B62D35/005 ,  F01P11/10 ,  F01P11/20 ,  F01P2011/205 ,  Y10S180/903

    摘要： A car spoiler having an aerodynamic surface for controlling the airflow around the automotive body is provided with a built-in liquid handling means which is used as a liquid reservoir, heat storage tank, or heat exchanger. The heat storage tank may be used to store the hot coolant of the cooling system of the engine during normal operation and to supply the hot coolant to the cooling system in order to quickly warm up the engine or to the hot-water car heater system in order to heat the passenger compartment during cold start of the engine. The built-in heat exchanger may be used to cool the engine coolant, engine lubricant, or transmission oil of the automatic transmission system.

    摘要翻译： 具有用于控制汽车车体周围的气流的空气动力学表面的汽车扰流板设置有用作液体储存器，储热箱或热交换器的内置液体处理装置。 储热罐可用于在正常运行期间存储发动机的冷却系统的热的冷却剂，并将热的冷却剂供应到冷却系统，以便快速地将发动机或热水车加热器系统预热 为了在发动机冷起动期间加热乘客舱。 内置热交换器可用于冷却自动变速器系统的发动机冷却液，发动机润滑油或变速器油。

    Air cleaning apparatus
    29.
    发明授权
    Air cleaning apparatus 失效
    空气净化装置

    公开(公告)号：US4673416A

    公开(公告)日：1987-06-16

    申请号：US874820

    申请日：1986-06-12

    申请人： Nobuyoshi Sakakibara ,  Tadashi Hattori ,  Kazuhiko Miura ,  Hiroki Noguchi ,  Akira Fukami ,  Teiichi Nabeta

    发明人： Nobuyoshi Sakakibara ,  Tadashi Hattori ,  Kazuhiko Miura ,  Hiroki Noguchi ,  Akira Fukami ,  Teiichi Nabeta

    IPC分类号： B03C3/12 ,  B03C3/41 ,  B03C3/60 ,  B03C3/66 ,  F24F1/00

    CPC分类号： B03C3/12 ,  B03C3/60 ,  B03C3/66

    摘要： An air cleaning apparatus having an electrical dust collecting section has discharge electrodes, electrical field forming electrodes arranged parallel to the flow of charged particles, and dust collecting electrodes each of which is arranged between corresponding two adjacent electrical field forming electrodes to be parallel thereto. One high voltage power source is arranged to generate a potential difference between the discharge electrodes and the dust collecting electrodes. Another high voltage power source is arranged to generate a potential difference between the electrical field forming electrodes and the dust collecting electrodes. Negative electrodes consisting of either the electrical field forming electrodes or the dust collecting electrodes are covered by insulator members.

    摘要翻译： 具有电集尘部的空气净化装置具有放电电极，与带电粒子的流动平行设置的电场形成电极，以及各自与相邻的两个相邻的电场形成电极平行的集尘电极。 一个高压电源被布置成产生放电电极和集尘电极之间的电位差。 布置另一高压电源以产生电场形成电极和集尘电极之间的电位差。 由电场形成电极或集尘电极组成的负极由绝缘体部件覆盖。

    Method of forming a large number of monocrystalline semiconductor regions on the surface of an insulator
    30.
    发明授权
    Method of forming a large number of monocrystalline semiconductor regions on the surface of an insulator 失效
    在绝缘体表面上形成大量单晶半导体区域的方法

    公开(公告)号：US4604159A

    公开(公告)日：1986-08-05

    申请号：US620023

    申请日：1984-06-13

    申请人： Yutaka Kobayashi ,  Akira Fukami ,  Takaya Suzuki

    发明人： Yutaka Kobayashi ,  Akira Fukami ,  Takaya Suzuki

    IPC分类号： H01L27/00 ,  H01L21/20 ,  H01L21/768 ,  H01L21/86 ,  C30B13/20

    CPC分类号： H01L21/76888 ,  H01L21/0242 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/02667 ,  H01L21/86 ,  Y10S117/90 ,  Y10S148/003 ,  Y10S148/05 ,  Y10S148/071 ,  Y10S148/074 ,  Y10S148/152

    摘要： Disclosed is a method of forming a large number of monocrystalline silicon regions, of uniform orientation, on the surface of an insulator material. Initially, a large number of island regions of amorphous or polycrystalline silicon, thermally connected to one another in a predetermined direction by connecting regions, are provided. Then such island regions are sequentially melted and regrown in such predetermined direction so as to form the monocrystalline semiconductor regions, with such regions having a uniform orientation. Thereafter, such connecting regions can be removed in order to isolate the island regions. The connecting regions can be formed with gaps, whereby such connecting regions need not be removed. The connecting regions can be formed of materials having a higher heat conductivity than that of the material of the island regions, and/or the connecting regions can have a smaller cross-sectional area at right angles to the predetermined direction than that of the island regions. Such island regions can be utilized for forming semiconductor elements, such as MOS FETs, therein.

    摘要翻译： 公开了在绝缘体材料的表面上形成均匀取向的大量单晶硅区域的方法。 首先，提供大量通过连接区域沿预定方向彼此热连接的非晶或多晶硅岛区域。 然后将这样的岛状区域顺序地熔融并以这样的预定方向重新生长，从而形成单晶半导体区域，这些区域具有均匀的取向。 此后，可以去除这样的连接区域以便隔离岛区域。 连接区域可以形成间隙，由此不需要去除这样的连接区域。 连接区域可以由具有比岛区域的材料的导热性高的材料形成，和/或连接区域可以具有比预定方向成直角的横截面积小于岛状区域 。 这样的岛状区域可用于在其中形成诸如MOS FET的半导体元件。