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42 条记录 (耗时 0.034 秒)

    Integrated Array Transmit/Receive Module
    21.
    发明申请
    Integrated Array Transmit/Receive Module 有权
    集成阵列发射/接收模块

    公开(公告)号：US20100167666A1

    公开(公告)日：2010-07-01

    申请号：US12347915

    申请日：2008-12-31

    申请人： Debabani Choudhury ,  Mark Ruberto

    发明人： Debabani Choudhury ,  Mark Ruberto

    IPC分类号： H04B1/38

    CPC分类号： H01Q21/0025 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01Q1/523 ,  H01Q21/062 ,  H01Q21/065 ,  H01Q21/067 ,  H01L2224/05599

    摘要： Disclosed are integration approaches for mm-wave array type architectures using multilayer substrate technologies. For instance, an apparatus may include a first substrate layer, a second substrate layer, and a third substrate layer. The first substrate layer has a first plurality of array elements, and the second substrate layer has a second plurality of array elements. The third substrate layer has an integrated circuit to exchange one or more radio frequency (RF) signals with the first and second pluralities of array elements. The first and second substrate layers are separated by approximately a half wavelength (λ/2) corresponding to the one or more RF signals.

    摘要翻译： 公开了使用多层衬底技术的mm波阵列型结构的集成方法。 例如，设备可以包括第一衬底层，第二衬底层和第三衬底层。 第一基板层具有第一多个阵列元件，第二基板层具有第二多个阵列元件。 第三衬底层具有用于与第一和第二多个阵列元件交换一个或多个射频（RF）信号的集成电路。 第一和第二衬底层与对应于一个或多个RF信号的近似半波长（λ/ 2）分开。

    CMOS IC and high-gain antenna integration for point-to-point wireless communication
    22.
    发明授权
    CMOS IC and high-gain antenna integration for point-to-point wireless communication 有权

    公开(公告)号：US07737894B2

    公开(公告)日：2010-06-15

    申请号：US11807987

    申请日：2007-05-31

    申请人： Debabani Choudhury

    发明人： Debabani Choudhury

    IPC分类号： H01Q1/24

    CPC分类号： H01Q13/0283 ,  H01Q1/243 ,  H01Q13/02

    摘要： A point-to-point radio communications device, with an integrated antenna-IC module, includes highly-directional antenna elements and silicon CMOS-based ICs in plastic packaging material. The high-gain horn-type antenna includes two sections made of molded plastic and covered in a metallic coating. When combined, the two sections form an aperture and an opening on a face. The face of the antenna element can be mounted directly to an integrated circuit with an antenna coupling element, such that the aperture forms a horn-IC module. The module can be completely enclosed in a plastic-packaging environment using low-cost approach. The antenna-IC module can be manufactured as an integral part of a case for a point-to-point wireless electronic device such as a mobile video phone or a set-top box with tens of gigabits of video downloading capability.

    Fabrication of high power semiconductor device with a heat sink and integration with planar microstrip circuitry
    25.
    发明授权
    Fabrication of high power semiconductor device with a heat sink and integration with planar microstrip circuitry 有权
    具有散热器并与平面微带电路集成的大功率半导体器件的制造

    公开(公告)号：US06274922B1

    公开(公告)日：2001-08-14

    申请号：US09334165

    申请日：1999-06-15

    申请人： Debabani Choudhury ,  James A. Foschaar ,  Phillip H. Lawyer ,  David B. Rensch

    发明人： Debabani Choudhury ,  James A. Foschaar ,  Phillip H. Lawyer ,  David B. Rensch

    IPC分类号： H01L21302

    CPC分类号： H01L23/36 ,  H01L21/4871 ,  H01L2224/48091 ,  H01L2924/1305 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.

    摘要翻译： 在功率半导体器件的背面上制造散热器的低成本高度集成的方法保持器件性能，改善热传递，并且实现可靠的平面连接，而不必将晶片或封装成分立的器件 - 散热器组件。 在晶片和前侧功率器件之间形成蚀刻停止层，以在背面处理期间保护它们，并降低器件与其散热器之间的接触电阻。 散热器通过使薄片变薄，图案化，然后以晶片的方式进行电镀而形成，使得可以在没有切割的情况下释放器件。 散热器优选地是过大的，使得真空工具可以从上面抓住散热器而不会损坏设备，然后将散热器压缩到平面微带电路组件上，该平面微带电路组件被设计和封装以便于容易地更换故障设备。

    Fabrication of high power semiconductor devices with respective heat sinks for integration with planar microstrip circuitry
    26.
    发明授权
    Fabrication of high power semiconductor devices with respective heat sinks for integration with planar microstrip circuitry 失效
    制造具有相应散热器的大功率半导体器件，用于与平面微带电路集成

    公开(公告)号：US6048777A

    公开(公告)日：2000-04-11

    申请号：US992882

    申请日：1997-12-18

    申请人： Debabani Choudhury ,  James A. Foschaar ,  Phillip H. Lawyer ,  David B. Rensch

    发明人： Debabani Choudhury ,  James A. Foschaar ,  Phillip H. Lawyer ,  David B. Rensch

    IPC分类号： H01L21/48 ,  H01L23/36 ,  H01L21/265

    CPC分类号： H01L23/36 ,  H01L21/4871 ,  H01L2224/48091 ,  H01L2924/1305

    摘要： A low cost highly integrated method of fabricating a heat sink on the backside of a power semiconductor device maintains device performance, improves thermal transfer, and enables reliable planar connections without having to dice the wafer or package the discrete device-heat sink assembly. An etch stop layer is formed between the wafer and the frontside power devices to protect them during backside processing and to reduce the contact resistance between the device and its heat sink. The heat sinks are formed by thinning, patterning and then plating the wafer in such a manner that the devices can be released without dicing. The heat sinks are preferably oversized so that a vacuum tool can grasp the heat sink from above without damaging the device and then compression bond the heat sink onto a planar microstrip circuit assembly, which is designed and packaged to facilitate easy replacement of failed devices.

    摘要翻译： 在功率半导体器件的背面上制造散热器的低成本高度集成的方法保持器件性能，改善热传递，并且实现可靠的平面连接，而不必将晶片或封装成分立的器件 - 散热器组件。 在晶片和前侧功率器件之间形成蚀刻停止层，以在背面处理期间保护它们，并降低器件与其散热器之间的接触电阻。 散热器通过使薄片化，图形化，然后以晶片的方式镀覆而形成，使得可以在不切割的情况下释放器件。 散热器优选地是过大的，使得真空工具可以从上面抓住散热器而不会损坏设备，然后将散热器压缩到平面微带电路组件上，该平面微带电路组件被设计和封装以便于容易地更换故障设备。

    Integrated array transmit/receive module
    29.
    发明授权
    Integrated array transmit/receive module 有权
    集成阵列发射/接收模块

    公开(公告)号：US08467737B2

    公开(公告)日：2013-06-18

    申请号：US12347915

    申请日：2008-12-31

    申请人： Debabani Choudhury ,  Mark Ruberto

    发明人： Debabani Choudhury ,  Mark Ruberto

    IPC分类号： H04B1/38

    CPC分类号： H01Q21/0025 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01Q1/523 ,  H01Q21/062 ,  H01Q21/065 ,  H01Q21/067 ,  H01L2224/05599

    摘要： Disclosed are integration approaches for mm-wave array type architectures using multilayer substrate technologies. For instance, an apparatus may include a first substrate layer, a second substrate layer, and a third substrate layer. The first substrate layer has a first plurality of array elements, and the second substrate layer has a second plurality of array elements. The third substrate layer has an integrated circuit to exchange one or more radio frequency (RF) signals with the first and second pluralities of array elements. The first and second substrate layers are separated by approximately a half wavelength (λ/2) corresponding to the one or more RF signals.

    摘要翻译： 公开了使用多层衬底技术的mm波阵列型结构的集成方法。 例如，设备可以包括第一衬底层，第二衬底层和第三衬底层。 第一基板层具有第一多个阵列元件，第二基板层具有第二多个阵列元件。 第三衬底层具有用于与第一和第二多个阵列元件交换一个或多个射频（RF）信号的集成电路。 第一和第二衬底层与对应于一个或多个RF信号的大约一半的波长（λ/ 2）分开。