公开(公告)号：US20200327214A1

公开(公告)日：2020-10-15

申请号：US16914609

申请日：2020-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chih Huang ,  Chih-Hsuan Tai ,  Yu-Jen Cheng ,  Chih-Hua Chen ,  Yu-Feng Chen ,  Hao-Yi Tsai ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC: G06F21/32 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L23/58 ,  G06K9/00 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00

Abstract: A device package includes a sensor die, one or more additional dies adjacent the sensor die, and a molding compound encircling the sensor die and the one or more additional dies. The device package further includes redistribution layers over the sensor die, the one or more additional dies, and the molding compound. The redistribution layers include first conductive features in a first dielectric layer. The first conductive features electrically connect the sensor die to the one or more additional dies. The redistribution layers further include an array of electrodes in a second dielectric layer over the first dielectric layer and electrically connected to the sensor die.

公开(公告)号：US10707094B2

公开(公告)日：2020-07-07

申请号：US16396779

申请日：2019-04-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Feng Chen ,  Chih-Hua Chen ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Hung-Jui Kuo ,  Hui-Jung Tsai ,  Hao-Yi Tsai

IPC: H01L21/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor package has a first redistribution layer, a first die, a second redistribution layer, and a surface coating layer. The first die is encapsulated within a molding material and disposed on and electrically connected to the first redistribution layer. The second redistribution layer is disposed on the molding material, on the first die, and electrically connected to the first die. The second redistribution layer has a topmost metallization layer having at least one contact pad, and the at least one contact pad includes a concave portion. The surface coating layer covers a portion of the topmost metallization layer and exposes the concave portion of the at least one contact pad. A manufacturing process is also provided.

公开(公告)号：US10672729B2

公开(公告)日：2020-06-02

申请号：US15726260

申请日：2017-10-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan Tai ,  Ting-Ting Kuo ,  Yu-Chih Huang ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Chih-Hua Chen ,  Ming-Da Cheng ,  Ching-Hua Hsieh ,  Hao-Yi Tsai ,  Chung-Shi Liu

IPC: H01L21/683 ,  H01L23/00 ,  H01L23/31

Abstract: A method of forming a package structure includes disposing a semiconductor device over a first dielectric layer, wherein a first redistribution line is in the first dielectric layer, forming a molding compound over the first dielectric layer and in contact with a sidewall of the semiconductor device, forming a second dielectric layer over the molding compound and the semiconductor device, forming a first opening in the second dielectric layer, the molding compound, and the first dielectric layer to expose the first redistribution line, and forming a first conductor in the first opening, wherein the first conductor is electrically connected to the first redistribution line.

公开(公告)号：US10510631B2

公开(公告)日：2019-12-17

申请号：US15706783

申请日：2017-09-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hsuan Tai ,  Chih-Hua Chen ,  Hao-Yi Tsai ,  Yu-Chih Huang ,  Chia-Hung Liu ,  Ting-Ting Kuo

IPC: H01L21/56 ,  H01L23/532 ,  H01L23/522 ,  H01L21/78 ,  H01L25/065 ,  H01L23/31 ,  H01L21/66 ,  H01L23/00

Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, a redistribution layer (RDL) structure, a through integrated fan-out via (TIV) and a first connector. The RDL structure is connected to the die and includes a plurality of RDLs. The TIV is aside the die and penetrates through the RDL structure. The first connector is in electrical contact with the TIV and electrically connected to the die. The TIV is in electrical contact with the RDLs of the RDL structure.

公开(公告)号：US20190088564A1

公开(公告)日：2019-03-21

申请号：US15706783

申请日：2017-09-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hsuan Tai ,  Chih-Hua Chen ,  Hao-Yi Tsai ,  Yu-Chih Huang ,  Chia-Hung Liu ,  Ting-Ting Kuo

IPC: H01L23/31 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/532 ,  H01L23/522

Abstract: A package structure and a method of manufacturing the same are provided. The package structure includes a die, a redistribution layer (RDL) structure, a through integrated fan-out via (TIV) and a first connector. The RDL structure is connected to the die and includes a plurality of RDLs. The TIV is aside the die and penetrates through the RDL structure. The first connector is in electrical contact with the TIV and electrically connected to the die. The TIV is in electrical contact with the RDLs of the RDL structure.

公开(公告)号：US10157808B2

公开(公告)日：2018-12-18

申请号：US15679027

申请日：2017-08-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hsuan Tai ,  Ting-Ting Kuo ,  Yu-Chih Huang ,  Chih-Hua Chen ,  Hao-Yi Tsai ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC: H04L23/00 ,  H01L23/31 ,  H01L23/528 ,  H01L23/522 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: A package structure includes a semiconductor device, a first molding compound, a through-via, a first dielectric layer, a first redistribution line, and a second molding compound. The first molding compound is in contact with a sidewall of the semiconductor device. The through-via is in the first molding compound and is electrically connected to the semiconductor device. The first dielectric layer is over the semiconductor device. The first redistribution line is in the first dielectric layer and is electrically connected to the semiconductor device and the through-via. The second molding compound is in contact with a sidewall of the first dielectric layer.

公开(公告)号：US09691708B1

公开(公告)日：2017-06-27

申请号：US15214475

申请日：2016-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chih Huang ,  Chih-Hua Chen ,  Chih-Wei Lin ,  Hao-Yi Tsai ,  Yu-Feng Chen ,  Yu-Jen Cheng ,  Chih-Hsuan Tai

IPC: H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/58 ,  H01L23/00 ,  G06K9/00

CPC classification number: H01L23/5389 ,  G06K9/0002 ,  G06K9/00053 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/19 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/83005

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution layer, a second redistribution layer, and a plurality of through interlayer vias. The molded semiconductor device includes a die. The first redistribution layer is disposed on a first side of the molded semiconductor device. The second redistribution layer is disposed on a second side of the molded semiconductor device opposite to the first side, wherein the second redistribution layer includes a patterned metal layer having an interconnection circuit portion electrically connected to the die and a metal ring surrounding and insulated from the interconnection circuit portion. The through interlayer vias are located right under the metal ring and extending through the molded semiconductor device to be electrically connect the first redistribution layer and the second redistribution layer.

公开(公告)号：US11625940B2

公开(公告)日：2023-04-11

申请号：US17106644

申请日：2020-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Yu-Feng Chen ,  Chih-Hua Chen ,  Hao-Yi Tsai ,  Chung-Shi Liu

IPC: G06K9/00 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/00 ,  H01L25/16 ,  G06V40/13

Abstract: A fingerprint sensor package and method are provided. The fingerprint sensor package comprises a fingerprint sensor along with a fingerprint sensor surface material and electrical connections from a first side of the fingerprint sensor to a second side of the fingerprint sensor. A high voltage chip is connected to the fingerprint sensor and then the fingerprint sensor package with the high voltage chip are connected to a substrate, wherein the substrate has an opening to accommodate the presence of the high voltage chip.

公开(公告)号：US11482491B2

公开(公告)日：2022-10-25

申请号：US15877398

申请日：2018-01-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Yu Chen ,  Chih-Hua Chen ,  Ching-Hua Hsieh ,  Hsiu-Jen Lin ,  Yu-Chih Huang ,  Yu-Peng Tsai ,  Chia-Shen Cheng ,  Chih-Chiang Tsao ,  Jen-Jui Yu

IPC: H01L23/528 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/522 ,  H01L23/538 ,  H01L21/683

Abstract: A package structure includes an insulating encapsulation, at least one die, and conductive structures. The at least one die is encapsulated in the insulating encapsulation. The conductive structures are located aside of the at least one die and surrounded by the insulating encapsulation, and at least one of the conductive structures is electrically connected to the at least one die. Each of the conductive structures has a first surface, a second surface opposite to the first surface and a slant sidewall connecting the first surface and the second surface, and each of the conductive structures has a top diameter greater than a bottom diameter thereof, and wherein each of the conductive structures has a plurality of pores distributed therein.

公开(公告)号：US20220278031A1

公开(公告)日：2022-09-01

申请号：US17663970

申请日：2022-05-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

IPC: H01L23/498 ,  H01L21/683 ,  H01L23/31 ,  H01L25/10

Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.